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@@ -135,7 +135,8 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
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struct irq_chip_type *ct;
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int ret;
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- sd->irq_base = irq_alloc_descs(-1, 0, SDV_NUM_PUB_GPIOS, -1);
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+ sd->irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0,
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+ SDV_NUM_PUB_GPIOS, -1);
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if (sd->irq_base < 0)
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return sd->irq_base;
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@@ -143,10 +144,11 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
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writel(0, sd->gpio_pub_base + GPIO_INT);
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writel((1 << 11) - 1, sd->gpio_pub_base + GPSTR);
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- ret = request_irq(pdev->irq, sdv_gpio_pub_irq_handler, IRQF_SHARED,
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- "sdv_gpio", sd);
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+ ret = devm_request_irq(&pdev->dev, pdev->irq,
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+ sdv_gpio_pub_irq_handler, IRQF_SHARED,
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+ "sdv_gpio", sd);
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if (ret)
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- goto out_free_desc;
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+ return ret;
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/*
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* This gpio irq controller latches level irqs. Testing shows that if
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@@ -155,10 +157,8 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
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*/
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sd->gc = irq_alloc_generic_chip("sdv-gpio", 1, sd->irq_base,
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sd->gpio_pub_base, handle_fasteoi_irq);
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- if (!sd->gc) {
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- ret = -ENOMEM;
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- goto out_free_irq;
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- }
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+ if (!sd->gc)
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+ return -ENOMEM;
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sd->gc->private = sd;
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ct = sd->gc->chip_types;
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@@ -176,16 +176,10 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
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sd->id = irq_domain_add_legacy(pdev->dev.of_node, SDV_NUM_PUB_GPIOS,
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sd->irq_base, 0, &irq_domain_sdv_ops, sd);
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- if (!sd->id) {
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- ret = -ENODEV;
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- goto out_free_irq;
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- }
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+ if (!sd->id)
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+ return -ENODEV;
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+
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return 0;
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-out_free_irq:
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- free_irq(pdev->irq, sd);
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-out_free_desc:
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- irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);
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- return ret;
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}
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static int sdv_gpio_probe(struct pci_dev *pdev,
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