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@@ -536,8 +536,8 @@ static bool vce_v3_0_is_idle(void *handle)
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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u32 mask = 0;
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u32 mask = 0;
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- mask |= (adev->vce.harvest_config & (1<<0)) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;
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- mask |= (adev->vce.harvest_config & (1<<1)) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK;
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+ mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;
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+ mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK;
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return !(RREG32(mmSRBM_STATUS2) & mask);
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return !(RREG32(mmSRBM_STATUS2) & mask);
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}
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}
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@@ -559,8 +559,8 @@ static int vce_v3_0_soft_reset(void *handle)
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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u32 mask = 0;
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u32 mask = 0;
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- mask |= (adev->vce.harvest_config & (1<<0)) ? 0 : SRBM_SOFT_RESET__SOFT_RESET_VCE0_MASK;
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- mask |= (adev->vce.harvest_config & (1<<1)) ? 0 : SRBM_SOFT_RESET__SOFT_RESET_VCE1_MASK;
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+ mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_SOFT_RESET__SOFT_RESET_VCE0_MASK;
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+ mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_SOFT_RESET__SOFT_RESET_VCE1_MASK;
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WREG32_P(mmSRBM_SOFT_RESET, mask,
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WREG32_P(mmSRBM_SOFT_RESET, mask,
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~(SRBM_SOFT_RESET__SOFT_RESET_VCE0_MASK |
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~(SRBM_SOFT_RESET__SOFT_RESET_VCE0_MASK |
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