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@@ -78,16 +78,22 @@
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#define STATUS_BUSY BIT(31)
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#define SD_EMMC_IRQ_EN 0x4c
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-#define IRQ_EN_MASK GENMASK(13, 0)
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#define IRQ_RXD_ERR_MASK GENMASK(7, 0)
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#define IRQ_TXD_ERR BIT(8)
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#define IRQ_DESC_ERR BIT(9)
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#define IRQ_RESP_ERR BIT(10)
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+#define IRQ_CRC_ERR \
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+ (IRQ_RXD_ERR_MASK | IRQ_TXD_ERR | IRQ_DESC_ERR | IRQ_RESP_ERR)
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#define IRQ_RESP_TIMEOUT BIT(11)
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#define IRQ_DESC_TIMEOUT BIT(12)
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+#define IRQ_TIMEOUTS \
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+ (IRQ_RESP_TIMEOUT | IRQ_DESC_TIMEOUT)
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#define IRQ_END_OF_CHAIN BIT(13)
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#define IRQ_RESP_STATUS BIT(14)
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#define IRQ_SDIO BIT(15)
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+#define IRQ_EN_MASK \
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+ (IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN | IRQ_RESP_STATUS |\
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+ IRQ_SDIO)
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#define SD_EMMC_CMD_CFG 0x50
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#define SD_EMMC_CMD_ARG 0x54
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@@ -760,57 +766,40 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id)
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struct mmc_command *cmd;
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struct mmc_data *data;
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u32 irq_en, status, raw_status;
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- irqreturn_t ret = IRQ_HANDLED;
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+ irqreturn_t ret = IRQ_NONE;
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- if (WARN_ON(!host))
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+ if (WARN_ON(!host) || WARN_ON(!host->cmd))
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return IRQ_NONE;
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- cmd = host->cmd;
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-
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- if (WARN_ON(!cmd))
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- return IRQ_NONE;
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+ spin_lock(&host->lock);
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+ cmd = host->cmd;
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data = cmd->data;
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-
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- spin_lock(&host->lock);
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irq_en = readl(host->regs + SD_EMMC_IRQ_EN);
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raw_status = readl(host->regs + SD_EMMC_STATUS);
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status = raw_status & irq_en;
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- if (!status) {
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- dev_warn(host->dev, "Spurious IRQ! status=0x%08x, irq_en=0x%08x\n",
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- raw_status, irq_en);
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- ret = IRQ_NONE;
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- goto out;
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- }
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-
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- meson_mmc_read_resp(host->mmc, cmd);
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-
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cmd->error = 0;
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- if (status & IRQ_RXD_ERR_MASK) {
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- dev_dbg(host->dev, "Unhandled IRQ: RXD error\n");
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- cmd->error = -EILSEQ;
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- }
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- if (status & IRQ_TXD_ERR) {
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- dev_dbg(host->dev, "Unhandled IRQ: TXD error\n");
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- cmd->error = -EILSEQ;
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- }
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- if (status & IRQ_DESC_ERR)
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- dev_dbg(host->dev, "Unhandled IRQ: Descriptor error\n");
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- if (status & IRQ_RESP_ERR) {
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- dev_dbg(host->dev, "Unhandled IRQ: Response error\n");
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+ if (status & IRQ_CRC_ERR) {
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+ dev_dbg(host->dev, "CRC Error - status 0x%08x\n", status);
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cmd->error = -EILSEQ;
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+ ret = IRQ_HANDLED;
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+ goto out;
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}
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- if (status & IRQ_RESP_TIMEOUT) {
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- dev_dbg(host->dev, "Unhandled IRQ: Response timeout\n");
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+
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+ if (status & IRQ_TIMEOUTS) {
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+ dev_dbg(host->dev, "Timeout - status 0x%08x\n", status);
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cmd->error = -ETIMEDOUT;
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+ ret = IRQ_HANDLED;
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+ goto out;
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}
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- if (status & IRQ_DESC_TIMEOUT) {
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- dev_dbg(host->dev, "Unhandled IRQ: Descriptor timeout\n");
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- cmd->error = -ETIMEDOUT;
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+
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+ meson_mmc_read_resp(host->mmc, cmd);
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+
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+ if (status & IRQ_SDIO) {
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+ dev_dbg(host->dev, "IRQ: SDIO TODO.\n");
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+ ret = IRQ_HANDLED;
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}
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- if (status & IRQ_SDIO)
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- dev_dbg(host->dev, "Unhandled IRQ: SDIO.\n");
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if (status & (IRQ_END_OF_CHAIN | IRQ_RESP_STATUS)) {
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if (data && !cmd->error)
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@@ -818,26 +807,20 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id)
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if (meson_mmc_bounce_buf_read(data) ||
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meson_mmc_get_next_command(cmd))
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ret = IRQ_WAKE_THREAD;
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- } else {
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- dev_warn(host->dev, "Unknown IRQ! status=0x%04x: MMC CMD%u arg=0x%08x flags=0x%08x stop=%d\n",
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- status, cmd->opcode, cmd->arg,
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- cmd->flags, cmd->mrq->stop ? 1 : 0);
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- if (cmd->data) {
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- struct mmc_data *data = cmd->data;
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-
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- dev_warn(host->dev, "\tblksz %u blocks %u flags 0x%08x (%s%s)",
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- data->blksz, data->blocks, data->flags,
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- data->flags & MMC_DATA_WRITE ? "write" : "",
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- data->flags & MMC_DATA_READ ? "read" : "");
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- }
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+ else
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+ ret = IRQ_HANDLED;
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}
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out:
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- /* ack all (enabled) interrupts */
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- writel(status, host->regs + SD_EMMC_STATUS);
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+ /* ack all enabled interrupts */
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+ writel(irq_en, host->regs + SD_EMMC_STATUS);
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if (ret == IRQ_HANDLED)
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meson_mmc_request_done(host->mmc, cmd->mrq);
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+ else if (ret == IRQ_NONE)
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+ dev_warn(host->dev,
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+ "Unexpected IRQ! status=0x%08x, irq_en=0x%08x\n",
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+ raw_status, irq_en);
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spin_unlock(&host->lock);
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return ret;
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@@ -1017,10 +1000,12 @@ static int meson_mmc_probe(struct platform_device *pdev)
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/* Stop execution */
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writel(0, host->regs + SD_EMMC_START);
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- /* clear, ack, enable all interrupts */
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+ /* clear, ack and enable interrupts */
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writel(0, host->regs + SD_EMMC_IRQ_EN);
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- writel(IRQ_EN_MASK, host->regs + SD_EMMC_STATUS);
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- writel(IRQ_EN_MASK, host->regs + SD_EMMC_IRQ_EN);
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+ writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN,
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+ host->regs + SD_EMMC_STATUS);
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+ writel(IRQ_CRC_ERR | IRQ_TIMEOUTS | IRQ_END_OF_CHAIN,
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+ host->regs + SD_EMMC_IRQ_EN);
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ret = devm_request_threaded_irq(&pdev->dev, irq, meson_mmc_irq,
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meson_mmc_irq_thread, IRQF_SHARED,
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