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@@ -297,14 +297,29 @@ static void dpu_crtc_destroy(struct drm_crtc *crtc)
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}
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}
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static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
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static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
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- struct dpu_plane_state *pstate)
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+ struct dpu_plane_state *pstate, struct dpu_format *format)
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{
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{
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struct dpu_hw_mixer *lm = mixer->hw_lm;
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struct dpu_hw_mixer *lm = mixer->hw_lm;
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+ uint32_t blend_op;
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+ struct drm_format_name_buf format_name;
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/* default to opaque blending */
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/* default to opaque blending */
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- lm->ops.setup_blend_config(lm, pstate->stage, 0XFF, 0,
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- DPU_BLEND_FG_ALPHA_FG_CONST |
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- DPU_BLEND_BG_ALPHA_BG_CONST);
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+ blend_op = DPU_BLEND_FG_ALPHA_FG_CONST |
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+ DPU_BLEND_BG_ALPHA_BG_CONST;
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+
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+ if (format->alpha_enable) {
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+ /* coverage blending */
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+ blend_op = DPU_BLEND_FG_ALPHA_FG_PIXEL |
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+ DPU_BLEND_BG_ALPHA_FG_PIXEL |
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+ DPU_BLEND_BG_INV_ALPHA;
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+ }
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+
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+ lm->ops.setup_blend_config(lm, pstate->stage,
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+ 0xFF, 0, blend_op);
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+
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+ DPU_DEBUG("format:%s, alpha_en:%u blend_op:0x%x\n",
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+ drm_get_format_name(format->base.pixel_format, &format_name),
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+ format->alpha_enable, blend_op);
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}
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}
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static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)
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static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)
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@@ -401,7 +416,8 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
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/* blend config update */
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/* blend config update */
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for (lm_idx = 0; lm_idx < dpu_crtc->num_mixers; lm_idx++) {
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for (lm_idx = 0; lm_idx < dpu_crtc->num_mixers; lm_idx++) {
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- _dpu_crtc_setup_blend_cfg(mixer + lm_idx, pstate);
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+ _dpu_crtc_setup_blend_cfg(mixer + lm_idx,
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+ pstate, format);
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mixer[lm_idx].flush_mask |= flush_mask;
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mixer[lm_idx].flush_mask |= flush_mask;
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