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@@ -2888,6 +2888,11 @@ static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,
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struct intel_engine_cs *engine)
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struct intel_engine_cs *engine)
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{
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{
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engine->write_tail = ring_write_tail;
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engine->write_tail = ring_write_tail;
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+
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+ if (INTEL_GEN(dev_priv) >= 6)
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+ engine->add_request = gen6_add_request;
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+ else
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+ engine->add_request = i9xx_add_request;
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}
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}
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int intel_init_render_ring_buffer(struct drm_device *dev)
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int intel_init_render_ring_buffer(struct drm_device *dev)
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@@ -2939,7 +2944,6 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
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}
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}
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} else if (INTEL_GEN(dev_priv) >= 6) {
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} else if (INTEL_GEN(dev_priv) >= 6) {
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engine->init_context = intel_rcs_ctx_init;
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engine->init_context = intel_rcs_ctx_init;
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- engine->add_request = gen6_add_request;
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engine->flush = gen7_render_ring_flush;
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engine->flush = gen7_render_ring_flush;
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if (IS_GEN6(dev_priv))
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if (IS_GEN6(dev_priv))
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engine->flush = gen6_render_ring_flush;
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engine->flush = gen6_render_ring_flush;
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@@ -2980,7 +2984,6 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
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engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT |
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engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT |
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GT_RENDER_PIPECTL_NOTIFY_INTERRUPT;
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GT_RENDER_PIPECTL_NOTIFY_INTERRUPT;
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} else {
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} else {
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- engine->add_request = i9xx_add_request;
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if (INTEL_GEN(dev_priv) < 4)
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if (INTEL_GEN(dev_priv) < 4)
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engine->flush = gen2_render_ring_flush;
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engine->flush = gen2_render_ring_flush;
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else
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else
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@@ -3062,7 +3065,6 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
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if (IS_GEN6(dev_priv))
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if (IS_GEN6(dev_priv))
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engine->write_tail = gen6_bsd_ring_write_tail;
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engine->write_tail = gen6_bsd_ring_write_tail;
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engine->flush = gen6_bsd_ring_flush;
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engine->flush = gen6_bsd_ring_flush;
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- engine->add_request = gen6_add_request;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->get_seqno = ring_get_seqno;
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engine->get_seqno = ring_get_seqno;
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engine->set_seqno = ring_set_seqno;
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engine->set_seqno = ring_set_seqno;
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@@ -3102,7 +3104,6 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
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} else {
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} else {
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engine->mmio_base = BSD_RING_BASE;
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engine->mmio_base = BSD_RING_BASE;
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engine->flush = bsd_ring_flush;
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engine->flush = bsd_ring_flush;
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- engine->add_request = i9xx_add_request;
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engine->get_seqno = ring_get_seqno;
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engine->get_seqno = ring_get_seqno;
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engine->set_seqno = ring_set_seqno;
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engine->set_seqno = ring_set_seqno;
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if (IS_GEN5(dev_priv)) {
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if (IS_GEN5(dev_priv)) {
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@@ -3138,7 +3139,6 @@ int intel_init_bsd2_ring_buffer(struct drm_device *dev)
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intel_ring_default_vfuncs(dev_priv, engine);
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intel_ring_default_vfuncs(dev_priv, engine);
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engine->flush = gen6_bsd_ring_flush;
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engine->flush = gen6_bsd_ring_flush;
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- engine->add_request = gen6_add_request;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->get_seqno = ring_get_seqno;
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engine->get_seqno = ring_get_seqno;
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engine->set_seqno = ring_set_seqno;
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engine->set_seqno = ring_set_seqno;
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@@ -3172,7 +3172,6 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
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intel_ring_default_vfuncs(dev_priv, engine);
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intel_ring_default_vfuncs(dev_priv, engine);
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engine->flush = gen6_ring_flush;
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engine->flush = gen6_ring_flush;
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- engine->add_request = gen6_add_request;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->get_seqno = ring_get_seqno;
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engine->get_seqno = ring_get_seqno;
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engine->set_seqno = ring_set_seqno;
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engine->set_seqno = ring_set_seqno;
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@@ -3233,7 +3232,6 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
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intel_ring_default_vfuncs(dev_priv, engine);
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intel_ring_default_vfuncs(dev_priv, engine);
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engine->flush = gen6_ring_flush;
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engine->flush = gen6_ring_flush;
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- engine->add_request = gen6_add_request;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->irq_seqno_barrier = gen6_seqno_barrier;
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engine->get_seqno = ring_get_seqno;
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engine->get_seqno = ring_get_seqno;
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engine->set_seqno = ring_set_seqno;
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engine->set_seqno = ring_set_seqno;
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