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@@ -116,9 +116,11 @@ int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr,
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pfn1 = kvm->arch.guest_pmap[gfn | 0x1];
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entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) |
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- (0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V;
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+ ((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |
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+ ENTRYLO_D | ENTRYLO_V;
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entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) |
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- (0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V;
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+ ((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |
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+ ENTRYLO_D | ENTRYLO_V;
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preempt_disable();
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entryhi = (vaddr | kvm_mips_get_kernel_asid(vcpu));
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@@ -157,13 +159,13 @@ int kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu,
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/* Get attributes from the Guest TLB */
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entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) |
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- (0x3 << ENTRYLO_C_SHIFT) |
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- (tlb->tlb_lo[0] & ENTRYLO_D) |
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- (tlb->tlb_lo[0] & ENTRYLO_V);
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+ ((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |
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+ (tlb->tlb_lo[0] & ENTRYLO_D) |
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+ (tlb->tlb_lo[0] & ENTRYLO_V);
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entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) |
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- (0x3 << ENTRYLO_C_SHIFT) |
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- (tlb->tlb_lo[1] & ENTRYLO_D) |
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- (tlb->tlb_lo[1] & ENTRYLO_V);
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+ ((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |
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+ (tlb->tlb_lo[1] & ENTRYLO_D) |
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+ (tlb->tlb_lo[1] & ENTRYLO_V);
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kvm_debug("@ %#lx tlb_lo0: 0x%08lx tlb_lo1: 0x%08lx\n", vcpu->arch.pc,
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tlb->tlb_lo[0], tlb->tlb_lo[1]);
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