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@@ -57,6 +57,14 @@
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clocks = <&xtal24mhz>;
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};
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+ kmiclk: kmiclk@24M {
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+ #clock-cells = <0>;
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+ compatible = "fixed-factor-clock";
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+ clock-div = <1>;
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+ clock-mult = <1>;
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+ clocks = <&xtal24mhz>;
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+ };
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+
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sspclk: sspclk@24M {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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@@ -280,6 +288,24 @@
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compatible = "simple-bus";
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ranges;
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+ fpga_kmi0: kmi@10006000 {
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+ compatible = "arm,pl050", "arm,primecell";
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+ reg = <0x10006000 0x1000>;
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+ interrupt-parent = <&intc_fpga1176>;
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+ interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&kmiclk>, <&pclk>;
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+ clock-names = "KMIREFCLK", "apb_pclk";
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+ };
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+
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+ fpga_kmi1: kmi@10007000 {
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+ compatible = "arm,pl050", "arm,primecell";
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+ reg = <0x10007000 0x1000>;
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+ interrupt-parent = <&intc_fpga1176>;
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+ interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&kmiclk>, <&pclk>;
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+ clock-names = "KMIREFCLK", "apb_pclk";
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+ };
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+
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fpga_charlcd: charlcd@10008000 {
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compatible = "arm,versatile-lcd";
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reg = <0x10008000 0x1000>;
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