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@@ -937,6 +937,10 @@ void i40e_reset_vf(struct i40e_vf *vf, bool flr)
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wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
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i40e_flush(hw);
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}
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+ /* clear the VFLR bit in GLGEN_VFLRSTAT */
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+ reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
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+ bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
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+ wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
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if (i40e_quiesce_vf_pci(vf))
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dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
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@@ -989,10 +993,6 @@ complete_reset:
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/* tell the VF the reset is done */
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wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
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- /* clear the VFLR bit in GLGEN_VFLRSTAT */
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- reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
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- bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
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- wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
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i40e_flush(hw);
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clear_bit(__I40E_VF_DISABLE, &pf->state);
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}
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@@ -2296,11 +2296,9 @@ int i40e_vc_process_vflr_event(struct i40e_pf *pf)
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/* read GLGEN_VFLRSTAT register to find out the flr VFs */
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vf = &pf->vf[vf_id];
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reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
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- if (reg & BIT(bit_idx)) {
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+ if (reg & BIT(bit_idx))
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/* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
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- if (!test_bit(__I40E_DOWN, &pf->state))
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- i40e_reset_vf(vf, true);
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- }
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+ i40e_reset_vf(vf, true);
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}
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return 0;
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