|
@@ -311,12 +311,19 @@ struct xhci_op_regs {
|
|
|
*/
|
|
|
#define PORT_PLS_MASK (0xf << 5)
|
|
|
#define XDEV_U0 (0x0 << 5)
|
|
|
+#define XDEV_U1 (0x1 << 5)
|
|
|
#define XDEV_U2 (0x2 << 5)
|
|
|
#define XDEV_U3 (0x3 << 5)
|
|
|
+#define XDEV_DISABLED (0x4 << 5)
|
|
|
+#define XDEV_RXDETECT (0x5 << 5)
|
|
|
#define XDEV_INACTIVE (0x6 << 5)
|
|
|
#define XDEV_POLLING (0x7 << 5)
|
|
|
-#define XDEV_COMP_MODE (0xa << 5)
|
|
|
+#define XDEV_RECOVERY (0x8 << 5)
|
|
|
+#define XDEV_HOT_RESET (0x9 << 5)
|
|
|
+#define XDEV_COMP_MODE (0xa << 5)
|
|
|
+#define XDEV_TEST_MODE (0xb << 5)
|
|
|
#define XDEV_RESUME (0xf << 5)
|
|
|
+
|
|
|
/* true: port has power (see HCC_PPC) */
|
|
|
#define PORT_POWER (1 << 9)
|
|
|
/* bits 10:13 indicate device speed:
|