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@@ -702,11 +702,13 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
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struct mlx4_qp_context *qpc = inbox->buf + 8;
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struct mlx4_vport_oper_state *vp_oper;
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struct mlx4_priv *priv;
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+ u32 qp_type;
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int port;
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port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1;
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priv = mlx4_priv(dev);
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vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];
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+ qp_type = (be32_to_cpu(qpc->flags) >> 16) & 0xff;
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if (MLX4_VGT != vp_oper->state.default_vlan) {
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/* the reserved QPs (special, proxy, tunnel)
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@@ -715,8 +717,20 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
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if (mlx4_is_qp_reserved(dev, qpn))
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return 0;
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- /* force strip vlan by clear vsd */
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- qpc->param3 &= ~cpu_to_be32(MLX4_STRIP_VLAN);
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+ /* force strip vlan by clear vsd, MLX QP refers to Raw Ethernet */
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+ if (qp_type == MLX4_QP_ST_UD ||
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+ (qp_type == MLX4_QP_ST_MLX && mlx4_is_eth(dev, port))) {
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+ if (dev->caps.bmme_flags & MLX4_BMME_FLAG_VSD_INIT2RTR) {
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+ *(__be32 *)inbox->buf =
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+ cpu_to_be32(be32_to_cpu(*(__be32 *)inbox->buf) |
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+ MLX4_QP_OPTPAR_VLAN_STRIPPING);
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+ qpc->param3 &= ~cpu_to_be32(MLX4_STRIP_VLAN);
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+ } else {
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+ struct mlx4_update_qp_params params = {.flags = 0};
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+
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+ mlx4_update_qp(dev, qpn, MLX4_UPDATE_QP_VSD, ¶ms);
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+ }
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+ }
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if (vp_oper->state.link_state == IFLA_VF_LINK_STATE_DISABLE &&
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dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_UPDATE_QP) {
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@@ -3998,13 +4012,17 @@ int mlx4_UPDATE_QP_wrapper(struct mlx4_dev *dev, int slave,
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}
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port = (rqp->sched_queue >> 6 & 1) + 1;
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- smac_index = cmd->qp_context.pri_path.grh_mylmc;
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- err = mac_find_smac_ix_in_slave(dev, slave, port,
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- smac_index, &mac);
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- if (err) {
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- mlx4_err(dev, "Failed to update qpn 0x%x, MAC is invalid. smac_ix: %d\n",
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- qpn, smac_index);
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- goto err_mac;
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+
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+ if (pri_addr_path_mask & (1ULL << MLX4_UPD_QP_PATH_MASK_MAC_INDEX)) {
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+ smac_index = cmd->qp_context.pri_path.grh_mylmc;
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+ err = mac_find_smac_ix_in_slave(dev, slave, port,
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+ smac_index, &mac);
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+
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+ if (err) {
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+ mlx4_err(dev, "Failed to update qpn 0x%x, MAC is invalid. smac_ix: %d\n",
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+ qpn, smac_index);
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+ goto err_mac;
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+ }
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}
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err = mlx4_cmd(dev, inbox->dma,
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@@ -4818,7 +4836,7 @@ void mlx4_vf_immed_vlan_work_handler(struct work_struct *_work)
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MLX4_VLAN_CTRL_ETH_RX_BLOCK_UNTAGGED;
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upd_context = mailbox->buf;
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- upd_context->qp_mask = cpu_to_be64(MLX4_UPD_QP_MASK_VSD);
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+ upd_context->qp_mask = cpu_to_be64(1ULL << MLX4_UPD_QP_MASK_VSD);
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spin_lock_irq(mlx4_tlock(dev));
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list_for_each_entry_safe(qp, tmp, qp_list, com.list) {
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