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@@ -71,9 +71,9 @@ static void dwmac4_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)
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writel(value, ioaddr + DMA_SYS_BUS_MODE);
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}
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-void dwmac4_dma_init_rx_chan(void __iomem *ioaddr,
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- struct stmmac_dma_cfg *dma_cfg,
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- u32 dma_rx_phy, u32 chan)
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+static void dwmac4_dma_init_rx_chan(void __iomem *ioaddr,
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+ struct stmmac_dma_cfg *dma_cfg,
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+ u32 dma_rx_phy, u32 chan)
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{
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u32 value;
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u32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;
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@@ -85,9 +85,9 @@ void dwmac4_dma_init_rx_chan(void __iomem *ioaddr,
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writel(dma_rx_phy, ioaddr + DMA_CHAN_RX_BASE_ADDR(chan));
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}
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-void dwmac4_dma_init_tx_chan(void __iomem *ioaddr,
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- struct stmmac_dma_cfg *dma_cfg,
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- u32 dma_tx_phy, u32 chan)
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+static void dwmac4_dma_init_tx_chan(void __iomem *ioaddr,
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+ struct stmmac_dma_cfg *dma_cfg,
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+ u32 dma_tx_phy, u32 chan)
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{
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u32 value;
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u32 txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;
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@@ -99,8 +99,8 @@ void dwmac4_dma_init_tx_chan(void __iomem *ioaddr,
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writel(dma_tx_phy, ioaddr + DMA_CHAN_TX_BASE_ADDR(chan));
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}
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-void dwmac4_dma_init_channel(void __iomem *ioaddr,
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- struct stmmac_dma_cfg *dma_cfg, u32 chan)
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+static void dwmac4_dma_init_channel(void __iomem *ioaddr,
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+ struct stmmac_dma_cfg *dma_cfg, u32 chan)
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{
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u32 value;
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