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@@ -78,6 +78,7 @@ struct vendor_data {
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bool oversampling;
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bool dma_threshold;
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bool cts_event_workaround;
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+ bool always_enabled;
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unsigned int (*get_fifosize)(struct amba_device *dev);
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};
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@@ -94,6 +95,7 @@ static struct vendor_data vendor_arm = {
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.oversampling = false,
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.dma_threshold = false,
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.cts_event_workaround = false,
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+ .always_enabled = false,
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.get_fifosize = get_fifosize_arm,
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};
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@@ -109,6 +111,7 @@ static struct vendor_data vendor_st = {
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.oversampling = true,
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.dma_threshold = true,
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.cts_event_workaround = true,
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+ .always_enabled = false,
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.get_fifosize = get_fifosize_st,
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};
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@@ -1958,7 +1961,7 @@ static void
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pl011_console_write(struct console *co, const char *s, unsigned int count)
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{
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struct uart_amba_port *uap = amba_ports[co->index];
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- unsigned int status, old_cr, new_cr;
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+ unsigned int status, old_cr = 0, new_cr;
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unsigned long flags;
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int locked = 1;
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@@ -1975,10 +1978,12 @@ pl011_console_write(struct console *co, const char *s, unsigned int count)
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/*
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* First save the CR then disable the interrupts
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*/
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- old_cr = readw(uap->port.membase + UART011_CR);
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- new_cr = old_cr & ~UART011_CR_CTSEN;
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- new_cr |= UART01x_CR_UARTEN | UART011_CR_TXE;
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- writew(new_cr, uap->port.membase + UART011_CR);
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+ if (!uap->vendor->always_enabled) {
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+ old_cr = readw(uap->port.membase + UART011_CR);
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+ new_cr = old_cr & ~UART011_CR_CTSEN;
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+ new_cr |= UART01x_CR_UARTEN | UART011_CR_TXE;
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+ writew(new_cr, uap->port.membase + UART011_CR);
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+ }
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uart_console_write(&uap->port, s, count, pl011_console_putchar);
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@@ -1989,7 +1994,8 @@ pl011_console_write(struct console *co, const char *s, unsigned int count)
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do {
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status = readw(uap->port.membase + UART01x_FR);
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} while (status & UART01x_FR_BUSY);
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- writew(old_cr, uap->port.membase + UART011_CR);
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+ if (!uap->vendor->always_enabled)
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+ writew(old_cr, uap->port.membase + UART011_CR);
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if (locked)
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spin_unlock(&uap->port.lock);
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