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@@ -1806,65 +1806,12 @@ static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
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return 0;
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}
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-/**
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- * rt5640_pll_calc - Calculate PLL M/N/K code.
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- * @freq_in: external clock provided to codec.
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- * @freq_out: target clock which codec works on.
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- * @pll_code: Pointer to structure with M, N, K and bypass flag.
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- *
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- * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
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- * which make calculation more efficiently.
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- *
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- * Returns 0 for success or negative error code.
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- */
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-static int rt5640_pll_calc(const unsigned int freq_in,
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- const unsigned int freq_out, struct rt5640_pll_code *pll_code)
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-{
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- int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
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- int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
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- int red_t = abs(freq_out - freq_in);
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- bool bypass = false;
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-
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- if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
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- return -EINVAL;
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-
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- for (n_t = 0; n_t <= max_n; n_t++) {
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- in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
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- if (in_t < 0)
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- continue;
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- if (in_t == freq_out) {
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- bypass = true;
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- n = n_t;
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- goto code_find;
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- }
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- for (m_t = 0; m_t <= max_m; m_t++) {
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- out_t = in_t / (m_t + 2);
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- red = abs(out_t - freq_out);
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- if (red < red_t) {
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- n = n_t;
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- m = m_t;
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- if (red == 0)
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- goto code_find;
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- red_t = red;
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- }
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- }
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- }
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- pr_debug("Only get approximation about PLL\n");
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-
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-code_find:
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- pll_code->m_bp = bypass;
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- pll_code->m_code = m;
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- pll_code->n_code = n;
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- pll_code->k_code = 2;
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- return 0;
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-}
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-
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static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
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unsigned int freq_in, unsigned int freq_out)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
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- struct rt5640_pll_code *pll_code = &rt5640->pll_code;
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+ struct rl6231_pll_code pll_code;
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int ret, dai_sel;
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if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
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@@ -1908,20 +1855,21 @@ static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
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return -EINVAL;
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}
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- ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
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+ ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
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if (ret < 0) {
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dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
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return ret;
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}
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- dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
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- (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
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+ dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
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+ pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
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+ pll_code.n_code, pll_code.k_code);
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snd_soc_write(codec, RT5640_PLL_CTRL1,
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- pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
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+ pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
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snd_soc_write(codec, RT5640_PLL_CTRL2,
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- (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
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- pll_code->m_bp << RT5640_PLL_M_BP_SFT);
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+ (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
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+ pll_code.m_bp << RT5640_PLL_M_BP_SFT);
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rt5640->pll_in = freq_in;
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rt5640->pll_out = freq_out;
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