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@@ -669,7 +669,7 @@ static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
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int ret;
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core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
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- *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
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+ *regvar = brcmf_sdiod_readl(bus->sdiodev, core->base + offset, &ret);
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return ret;
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}
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@@ -680,7 +680,7 @@ static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
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int ret;
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core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
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- brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
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+ brcmf_sdiod_writel(bus->sdiodev, core->base + reg_offset, regval, &ret);
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return ret;
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}
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@@ -697,8 +697,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
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wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
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/* 1st KSO write goes to AOS wake up core if device is asleep */
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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- wr_val, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
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if (on) {
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/* device WAKEUP through KSO:
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@@ -724,7 +723,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
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* just one write attempt may fail,
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* read it back until it matches written value
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*/
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- rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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+ rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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&err);
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if (!err) {
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if ((rd_val & bmask) == cmp_val)
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@@ -734,9 +733,11 @@ brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
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/* bail out upon subsequent access errors */
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if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
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break;
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+
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udelay(KSO_WAIT_US);
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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- wr_val, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
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+ &err);
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+
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} while (try_cnt++ < MAX_KSO_ATTEMPTS);
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if (try_cnt > 2)
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@@ -772,15 +773,15 @@ static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
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clkreq =
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bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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- clkreq, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ clkreq, &err);
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if (err) {
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brcmf_err("HT Avail request error: %d\n", err);
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return -EBADE;
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}
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/* Check current status */
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- clkctl = brcmf_sdiod_regrb(bus->sdiodev,
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+ clkctl = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_FUNC1_CHIPCLKCSR, &err);
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if (err) {
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brcmf_err("HT Avail read error: %d\n", err);
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@@ -790,35 +791,34 @@ static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
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/* Go to pending and await interrupt if appropriate */
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if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
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/* Allow only clock-available interrupt */
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- devctl = brcmf_sdiod_regrb(bus->sdiodev,
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+ devctl = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_DEVICE_CTL, &err);
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if (err) {
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- brcmf_err("Devctl error setting CA: %d\n",
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- err);
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+ brcmf_err("Devctl error setting CA: %d\n", err);
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return -EBADE;
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}
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devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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- devctl, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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+ devctl, &err);
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brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
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bus->clkstate = CLK_PENDING;
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return 0;
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} else if (bus->clkstate == CLK_PENDING) {
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/* Cancel CA-only interrupt filter */
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- devctl = brcmf_sdiod_regrb(bus->sdiodev,
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+ devctl = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_DEVICE_CTL, &err);
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devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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- devctl, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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+ devctl, &err);
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}
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/* Otherwise, wait here (polling) for HT Avail */
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timeout = jiffies +
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msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
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while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
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- clkctl = brcmf_sdiod_regrb(bus->sdiodev,
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+ clkctl = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_FUNC1_CHIPCLKCSR,
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&err);
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if (time_after(jiffies, timeout))
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@@ -852,16 +852,16 @@ static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
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if (bus->clkstate == CLK_PENDING) {
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/* Cancel CA-only interrupt filter */
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- devctl = brcmf_sdiod_regrb(bus->sdiodev,
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+ devctl = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_DEVICE_CTL, &err);
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devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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- devctl, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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+ devctl, &err);
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}
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bus->clkstate = CLK_SDONLY;
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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- clkreq, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ clkreq, &err);
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brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
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if (err) {
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brcmf_err("Failed access turning clock off: %d\n",
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@@ -951,14 +951,14 @@ brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
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/* Going to sleep */
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if (sleep) {
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- clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
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+ clkcsr = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_FUNC1_CHIPCLKCSR,
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&err);
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if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
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brcmf_dbg(SDIO, "no clock, set ALP\n");
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- brcmf_sdiod_regwb(bus->sdiodev,
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- SBSDIO_FUNC1_CHIPCLKCSR,
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- SBSDIO_ALP_AVAIL_REQ, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev,
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+ SBSDIO_FUNC1_CHIPCLKCSR,
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+ SBSDIO_ALP_AVAIL_REQ, &err);
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}
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err = brcmf_sdio_kso_control(bus, false);
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} else {
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@@ -1178,16 +1178,16 @@ static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
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if (abort)
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brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
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- SFC_RF_TERM, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
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+ &err);
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bus->sdcnt.f1regdata++;
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/* Wait until the packet has been flushed (device/FIFO stable) */
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for (lastrbc = retries = 0xffff; retries > 0; retries--) {
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- hi = brcmf_sdiod_regrb(bus->sdiodev,
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- SBSDIO_FUNC1_RFRAMEBCHI, &err);
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- lo = brcmf_sdiod_regrb(bus->sdiodev,
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- SBSDIO_FUNC1_RFRAMEBCLO, &err);
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+ hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
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+ &err);
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+ lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
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+ &err);
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bus->sdcnt.f1regdata += 2;
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if ((hi == 0) && (lo == 0))
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@@ -1229,12 +1229,12 @@ static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
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bus->sdcnt.tx_sderrs++;
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brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
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bus->sdcnt.f1regdata++;
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for (i = 0; i < 3; i++) {
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- hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
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- lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
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+ hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
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+ lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
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bus->sdcnt.f1regdata += 2;
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if ((hi == 0) && (lo == 0))
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break;
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@@ -2446,11 +2446,11 @@ static void brcmf_sdio_bus_stop(struct device *dev)
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bus->hostintmask = 0;
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/* Force backplane clocks to assure F2 interrupt propagates */
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- saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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&err);
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if (!err)
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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- (saveclk | SBSDIO_FORCE_HT), &err);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ (saveclk | SBSDIO_FORCE_HT), &err);
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if (err)
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brcmf_err("Failed to force clock for F2: err %d\n",
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err);
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@@ -2509,7 +2509,7 @@ static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
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buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
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addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
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- val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
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+ val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
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bus->sdcnt.f1regdata++;
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if (ret != 0)
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return ret;
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@@ -2519,7 +2519,7 @@ static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
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/* Clear interrupts */
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if (val) {
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- brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
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+ brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
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bus->sdcnt.f1regdata++;
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atomic_or(val, &bus->intstatus);
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}
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@@ -2545,23 +2545,23 @@ static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
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#ifdef DEBUG
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/* Check for inconsistent device control */
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- devctl = brcmf_sdiod_regrb(bus->sdiodev,
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- SBSDIO_DEVICE_CTL, &err);
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+ devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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+ &err);
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#endif /* DEBUG */
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/* Read CSR, if clock on switch to AVAIL, else ignore */
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- clkctl = brcmf_sdiod_regrb(bus->sdiodev,
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+ clkctl = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_FUNC1_CHIPCLKCSR, &err);
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brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
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devctl, clkctl);
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if (SBSDIO_HTAV(clkctl)) {
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- devctl = brcmf_sdiod_regrb(bus->sdiodev,
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+ devctl = brcmf_sdiod_readb(bus->sdiodev,
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SBSDIO_DEVICE_CTL, &err);
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devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
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- devctl, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev,
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+ SBSDIO_DEVICE_CTL, devctl, &err);
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bus->clkstate = CLK_AVAIL;
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}
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}
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@@ -3347,31 +3347,31 @@ static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
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brcmf_dbg(TRACE, "Enter\n");
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- val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
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+ val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
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if (err) {
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brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
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return;
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}
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val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
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if (err) {
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brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
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return;
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}
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/* Add CMD14 Support */
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- brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
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- (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
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- SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
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- &err);
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+ brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
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+ (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
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+ SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
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+ &err);
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if (err) {
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brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
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return;
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}
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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- SBSDIO_FORCE_HT, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ SBSDIO_FORCE_HT, &err);
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if (err) {
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brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
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return;
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@@ -3394,7 +3394,7 @@ static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
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if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
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return 0;
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- val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
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+ val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
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if (err) {
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brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
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return err;
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@@ -3403,8 +3403,8 @@ static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
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if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
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val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
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SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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- val, &err);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
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+ val, &err);
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if (err) {
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brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
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return err;
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@@ -3565,9 +3565,9 @@ static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
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u8 devpend;
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sdio_claim_host(bus->sdiodev->func[1]);
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- devpend = brcmf_sdiod_regrb(bus->sdiodev,
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- SDIO_CCCR_INTx,
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- NULL);
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+ devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
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+ SDIO_CCCR_INTx,
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+ NULL);
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sdio_release_host(bus->sdiodev->func[1]);
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intstatus = devpend & (INTR_STATUS_FUNC1 |
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INTR_STATUS_FUNC2);
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@@ -3705,12 +3705,12 @@ brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
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}
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}
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addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
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- brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
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- cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
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+ brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
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+ cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
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cc_data_temp &= ~str_mask;
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drivestrength_sel <<= str_shift;
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cc_data_temp |= drivestrength_sel;
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- brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
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+ brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
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brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
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str_tab[i].strength, drivestrength, cc_data_temp);
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@@ -3725,7 +3725,7 @@ static int brcmf_sdio_buscoreprep(void *ctx)
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/* Try forcing SDIO core to do ALPAvail request only */
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clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
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if (err) {
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brcmf_err("error writing for HT off\n");
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return err;
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@@ -3733,8 +3733,7 @@ static int brcmf_sdio_buscoreprep(void *ctx)
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/* If register supported, wait for ALPAvail and then force ALP */
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/* This may take up to 15 milliseconds */
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- clkval = brcmf_sdiod_regrb(sdiodev,
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- SBSDIO_FUNC1_CHIPCLKCSR, NULL);
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+ clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
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if ((clkval & ~SBSDIO_AVBITS) != clkset) {
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brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
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@@ -3742,10 +3741,11 @@ static int brcmf_sdio_buscoreprep(void *ctx)
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return -EACCES;
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}
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- SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
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- SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
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- !SBSDIO_ALPAV(clkval)),
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- PMU_MAX_TRANSITION_DLY);
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+ SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ NULL)),
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+ !SBSDIO_ALPAV(clkval)),
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+ PMU_MAX_TRANSITION_DLY);
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+
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if (!SBSDIO_ALPAV(clkval)) {
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brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
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clkval);
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@@ -3753,11 +3753,11 @@ static int brcmf_sdio_buscoreprep(void *ctx)
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}
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clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
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udelay(65);
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/* Also, disable the extra SDIO pull-ups */
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
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return 0;
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}
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@@ -3772,7 +3772,7 @@ static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
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/* clear all interrupts */
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core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
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reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
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- brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
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+ brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
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if (rstvec)
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/* Write reset vector to address 0 */
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@@ -3785,7 +3785,7 @@ static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
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struct brcmf_sdio_dev *sdiodev = ctx;
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u32 val, rev;
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- val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
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+ val = brcmf_sdiod_readl(sdiodev, addr, NULL);
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if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
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sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
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addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
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@@ -3802,7 +3802,7 @@ static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
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{
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struct brcmf_sdio_dev *sdiodev = ctx;
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- brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
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+ brcmf_sdiod_writel(sdiodev, addr, val, NULL);
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}
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static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
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@@ -3826,18 +3826,18 @@ brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
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sdio_claim_host(sdiodev->func[1]);
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pr_debug("F1 signature read @0x18000000=0x%4x\n",
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- brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
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+ brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
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/*
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* Force PLL off until brcmf_chip_attach()
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* programs PLL control regs
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*/
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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- BRCMF_INIT_CLKCTL1, &err);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
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+ &err);
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if (!err)
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- clkctl = brcmf_sdiod_regrb(sdiodev,
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- SBSDIO_FUNC1_CHIPCLKCSR, &err);
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+ clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ &err);
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if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
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brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
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@@ -3897,25 +3897,25 @@ brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
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brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
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/* Set card control so an SDIO card reset does a WLAN backplane reset */
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- reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
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+ reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
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if (err)
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goto fail;
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reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
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- brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
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+ brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
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if (err)
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goto fail;
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/* set PMUControl so a backplane reset does PMU state reload */
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reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
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- reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
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+ reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
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if (err)
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goto fail;
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reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
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- brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
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+ brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
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if (err)
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goto fail;
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@@ -4055,10 +4055,10 @@ static void brcmf_sdio_firmware_callback(struct device *dev, int err,
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goto release;
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/* Force clocks on backplane to be sure F2 interrupt propagates */
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- saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
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+ saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
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if (!err) {
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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- (saveclk | SBSDIO_FORCE_HT), &err);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ (saveclk | SBSDIO_FORCE_HT), &err);
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}
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if (err) {
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brcmf_err("Failed to force clock for F2: err %d\n", err);
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@@ -4080,7 +4080,7 @@ static void brcmf_sdio_firmware_callback(struct device *dev, int err,
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w_sdreg32(bus, bus->hostintmask,
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offsetof(struct sdpcmd_regs, hostintmask));
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_WATERMARK, 8, &err);
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} else {
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/* Disable F2 again */
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sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
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@@ -4091,8 +4091,8 @@ static void brcmf_sdio_firmware_callback(struct device *dev, int err,
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brcmf_sdio_sr_init(bus);
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} else {
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/* Restore previous clock setting */
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- brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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- saveclk, &err);
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+ brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
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+ saveclk, &err);
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}
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if (err == 0) {
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@@ -4224,7 +4224,7 @@ struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
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bus->rxflow = false;
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/* Done with backplane-dependent accesses, can drop clock... */
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- brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
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+ brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
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sdio_release_host(bus->sdiodev->func[1]);
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