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@@ -29,11 +29,16 @@
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#define ADC_CAL (0x1 << 7)
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#define ADC_CALF 0x2
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#define ADC_12BIT_MODE (0x2 << 2)
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+#define ADC_CONV_MODE_MASK (0x3 << 2)
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#define ADC_IPG_CLK 0x00
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+#define ADC_INPUT_CLK_MASK 0x3
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#define ADC_CLK_DIV_8 (0x03 << 5)
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+#define ADC_CLK_DIV_MASK (0x3 << 5)
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#define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
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+#define ADC_SAMPLE_MODE_MASK (0x1 << 4)
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#define ADC_HARDWARE_TRIGGER (0x1 << 13)
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#define ADC_AVGS_SHIFT 14
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+#define ADC_AVGS_MASK (0x3 << 14)
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#define SELECT_CHANNEL_4 0x04
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#define SELECT_CHANNEL_1 0x01
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#define DISABLE_CONVERSION_INT (0x0 << 7)
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@@ -108,10 +113,14 @@ static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
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reinit_completion(&tsc->completion);
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adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
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+ adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK);
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adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
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+ adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK);
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adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
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- if (tsc->average_samples)
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+ if (tsc->average_samples) {
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+ adc_cfg &= ~ADC_AVGS_MASK;
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adc_cfg |= (tsc->average_samples - 1) << ADC_AVGS_SHIFT;
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+ }
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adc_cfg &= ~ADC_HARDWARE_TRIGGER;
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writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
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