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@@ -870,7 +870,6 @@ static void __init sunxi_gates_clk_setup(struct device_node *node,
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int qty;
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int qty;
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int i = 0;
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int i = 0;
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int j = 0;
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int j = 0;
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- int ignore;
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reg = of_iomap(node, 0);
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reg = of_iomap(node, 0);
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@@ -891,11 +890,8 @@ static void __init sunxi_gates_clk_setup(struct device_node *node,
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of_property_read_string_index(node, "clock-output-names",
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of_property_read_string_index(node, "clock-output-names",
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j, &clk_name);
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j, &clk_name);
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- /* No driver claims this clock, but it should remain gated */
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- ignore = !strcmp("ahb_sdram", clk_name) ? CLK_IGNORE_UNUSED : 0;
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-
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clk_data->clks[i] = clk_register_gate(NULL, clk_name,
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clk_data->clks[i] = clk_register_gate(NULL, clk_name,
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- clk_parent, ignore,
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+ clk_parent, 0,
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reg + 4 * (i/32), i % 32,
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reg + 4 * (i/32), i % 32,
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0, &clk_lock);
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0, &clk_lock);
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WARN_ON(IS_ERR(clk_data->clks[i]));
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WARN_ON(IS_ERR(clk_data->clks[i]));
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@@ -1203,6 +1199,7 @@ static void __init sunxi_init_clocks(const char *clocks[], int nclocks)
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static const char *sun4i_a10_critical_clocks[] __initdata = {
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static const char *sun4i_a10_critical_clocks[] __initdata = {
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"pll5_ddr",
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"pll5_ddr",
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+ "ahb_sdram",
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};
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};
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static void __init sun4i_a10_init_clocks(struct device_node *node)
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static void __init sun4i_a10_init_clocks(struct device_node *node)
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@@ -1215,6 +1212,7 @@ CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sun4i_a10_init_clocks)
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static const char *sun5i_critical_clocks[] __initdata = {
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static const char *sun5i_critical_clocks[] __initdata = {
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"mbus",
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"mbus",
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"pll5_ddr",
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"pll5_ddr",
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+ "ahb_sdram",
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};
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};
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static void __init sun5i_init_clocks(struct device_node *node)
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static void __init sun5i_init_clocks(struct device_node *node)
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