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@@ -309,7 +309,8 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
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div = temp / 512;
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clk_cycle = temp / (div + 1) - 2;
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if (temp < 4 || div >= 256 || clk_cycle < 2) {
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- dev_warn(i2c->dev, "Failed to calculate divisor");
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+ dev_err(i2c->dev, "%s clock set-up failed\n",
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+ hs_timings ? "HS" : "FS");
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return -EINVAL;
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}
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@@ -351,24 +352,13 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
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static int exynos5_hsi2c_clock_setup(struct exynos5_i2c *i2c)
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{
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- /*
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- * Configure the Fast speed timing values
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- * Even the High Speed mode initially starts with Fast mode
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- */
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- if (exynos5_i2c_set_timing(i2c, false)) {
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- dev_err(i2c->dev, "HSI2C FS Clock set up failed\n");
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- return -EINVAL;
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- }
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+ /* always set Fast Speed timings */
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+ int ret = exynos5_i2c_set_timing(i2c, false);
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- /* configure the High speed timing values */
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- if (i2c->op_clock >= HSI2C_HS_TX_CLOCK) {
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- if (exynos5_i2c_set_timing(i2c, true)) {
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- dev_err(i2c->dev, "HSI2C HS Clock set up failed\n");
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- return -EINVAL;
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- }
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- }
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+ if (ret < 0 || i2c->op_clock < HSI2C_HS_TX_CLOCK)
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+ return ret;
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- return 0;
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+ return exynos5_i2c_set_timing(i2c, true);
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}
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/*
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