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@@ -87,7 +87,7 @@
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#define CLKID_PERIPHS 20
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#define CLKID_PERIPHS 20
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#define CLKID_SPICC 21
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#define CLKID_SPICC 21
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#define CLKID_I2C 22
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#define CLKID_I2C 22
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-#define CLKID_SAR_ADC 23
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+/* #define CLKID_SAR_ADC */
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#define CLKID_SMART_CARD 24
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#define CLKID_SMART_CARD 24
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#define CLKID_RNG0 25
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#define CLKID_RNG0 25
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#define CLKID_UART0 26
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#define CLKID_UART0 26
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@@ -133,7 +133,7 @@
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#define CLKID_MMC_PCLK 66
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#define CLKID_MMC_PCLK 66
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#define CLKID_DVIN 67
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#define CLKID_DVIN 67
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#define CLKID_UART2 68
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#define CLKID_UART2 68
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-#define CLKID_SANA 69
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+/* #define CLKID_SANA */
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#define CLKID_VPU_INTR 70
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#define CLKID_VPU_INTR 70
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#define CLKID_SEC_AHB_AHB3_BRIDGE 71
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#define CLKID_SEC_AHB_AHB3_BRIDGE 71
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#define CLKID_CLK81_A9 72
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#define CLKID_CLK81_A9 72
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