|
@@ -323,6 +323,30 @@ static u8
|
|
|
[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
|
|
|
BQ27XXX_DM_REG_ROWS,
|
|
|
},
|
|
|
+ bq27521_regs[BQ27XXX_REG_MAX] = {
|
|
|
+ [BQ27XXX_REG_CTRL] = 0x02,
|
|
|
+ [BQ27XXX_REG_TEMP] = 0x0a,
|
|
|
+ [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_VOLT] = 0x0c,
|
|
|
+ [BQ27XXX_REG_AI] = 0x0e,
|
|
|
+ [BQ27XXX_REG_FLAGS] = 0x08,
|
|
|
+ [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
|
|
|
+ [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
|
|
|
+ },
|
|
|
bq27530_regs[BQ27XXX_REG_MAX] = {
|
|
|
[BQ27XXX_REG_CTRL] = 0x00,
|
|
|
[BQ27XXX_REG_TEMP] = 0x06,
|
|
@@ -557,6 +581,15 @@ static enum power_supply_property bq27520g4_props[] = {
|
|
|
POWER_SUPPLY_PROP_MANUFACTURER,
|
|
|
};
|
|
|
|
|
|
+static enum power_supply_property bq27521_props[] = {
|
|
|
+ POWER_SUPPLY_PROP_STATUS,
|
|
|
+ POWER_SUPPLY_PROP_PRESENT,
|
|
|
+ POWER_SUPPLY_PROP_VOLTAGE_NOW,
|
|
|
+ POWER_SUPPLY_PROP_CURRENT_NOW,
|
|
|
+ POWER_SUPPLY_PROP_TEMP,
|
|
|
+ POWER_SUPPLY_PROP_TECHNOLOGY,
|
|
|
+};
|
|
|
+
|
|
|
static enum power_supply_property bq27530_props[] = {
|
|
|
POWER_SUPPLY_PROP_STATUS,
|
|
|
POWER_SUPPLY_PROP_PRESENT,
|
|
@@ -671,6 +704,7 @@ static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
|
|
|
#define bq27520g2_dm_regs 0
|
|
|
#define bq27520g3_dm_regs 0
|
|
|
#define bq27520g4_dm_regs 0
|
|
|
+#define bq27521_dm_regs 0
|
|
|
#define bq27530_dm_regs 0
|
|
|
#define bq27531_dm_regs 0
|
|
|
#define bq27541_dm_regs 0
|
|
@@ -717,8 +751,8 @@ static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
|
|
|
#endif
|
|
|
|
|
|
#define BQ27XXX_O_ZERO 0x00000001
|
|
|
-#define BQ27XXX_O_OTDC 0x00000002
|
|
|
-#define BQ27XXX_O_UTOT 0x00000004
|
|
|
+#define BQ27XXX_O_OTDC 0x00000002 /* has OTC/OTD overtemperature flags */
|
|
|
+#define BQ27XXX_O_UTOT 0x00000004 /* has OT overtemperature flag */
|
|
|
#define BQ27XXX_O_CFGUP 0x00000008
|
|
|
#define BQ27XXX_O_RAM 0x00000010
|
|
|
|
|
@@ -751,6 +785,7 @@ static struct {
|
|
|
[BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
|
|
|
[BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
|
|
|
[BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
|
|
|
+ [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
|
|
|
[BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
|
|
|
[BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
|
|
|
[BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
|