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@@ -263,6 +263,44 @@
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cache-level = <2>;
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};
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+ nand0: nand@80000000 {
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+ compatible = "atmel,sama5d2-nand";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+ reg = < /* EBI CS3 */
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+ 0x80000000 0x08000000
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+ /* SMC PMECC regs */
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+ 0xf8014070 0x00000490
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+ /* SMC PMECC Error Location regs */
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+ 0xf8014500 0x00000200
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+ /* ROM Galois tables */
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+ 0x00040000 0x00018000
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+ >;
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+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
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+ atmel,nand-addr-offset = <21>;
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+ atmel,nand-cmd-offset = <22>;
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+ atmel,nand-has-dma;
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+ atmel,has-pmecc;
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+ atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
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+ status = "disabled";
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+
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+ nfc@c0000000 {
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+ compatible = "atmel,sama5d4-nfc";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = < /* NFC Command Registers */
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+ 0xc0000000 0x08000000
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+ /* NFC HSMC regs */
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+ 0xf8014000 0x00000070
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+ /* NFC SRAM banks */
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+ 0x00100000 0x00100000
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+ >;
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+ clocks = <&hsmc_clk>;
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+ atmel,write-by-sram;
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+ };
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+ };
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+
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sdmmc0: sdio-host@a0000000 {
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compatible = "atmel,sama5d2-sdhci";
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reg = <0xa0000000 0x300>;
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@@ -880,6 +918,13 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf801c000 0x100>;
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
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+ dmas = <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(35))>,
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+ <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(36))>;
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+ dma-names = "tx", "rx";
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clocks = <&uart0_clk>;
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clock-names = "usart";
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status = "disabled";
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@@ -889,6 +934,13 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8020000 0x100>;
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interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
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+ dmas = <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(37))>,
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+ <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(38))>;
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+ dma-names = "tx", "rx";
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clocks = <&uart1_clk>;
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clock-names = "usart";
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status = "disabled";
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@@ -898,6 +950,13 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xf8024000 0x100>;
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interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
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+ dmas = <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(39))>,
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+ <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(40))>;
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+ dma-names = "tx", "rx";
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clocks = <&uart2_clk>;
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clock-names = "usart";
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status = "disabled";
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@@ -1016,6 +1075,13 @@
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfc008000 0x100>;
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interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
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+ dmas = <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(41))>,
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+ <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(42))>;
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+ dma-names = "tx", "rx";
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clocks = <&uart3_clk>;
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clock-names = "usart";
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status = "disabled";
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@@ -1024,6 +1090,13 @@
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uart4: serial@fc00c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfc00c000 0x100>;
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+ dmas = <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(43))>,
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+ <&dma0
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+ (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
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+ AT91_XDMAC_DT_PERID(44))>;
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+ dma-names = "tx", "rx";
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interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&uart4_clk>;
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clock-names = "usart";
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