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@@ -20,7 +20,6 @@
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#include <linux/io.h>
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#include <linux/gpio.h>
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-#include <sound/ac97_codec.h>
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#include <sound/pxa2xx-lib.h>
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#include <mach/irqs.h>
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@@ -46,38 +45,41 @@ extern void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio);
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* 1 jiffy timeout if interrupt never comes).
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*/
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-unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
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+int pxa2xx_ac97_read(int slot, unsigned short reg)
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{
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- unsigned short val = -1;
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+ int val = -ENODEV;
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volatile u32 *reg_addr;
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+ if (slot > 0)
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+ return -ENODEV;
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+
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mutex_lock(&car_mutex);
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/* set up primary or secondary codec space */
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if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
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- reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
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+ reg_addr = slot ? &SMC_REG_BASE : &PMC_REG_BASE;
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else
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- reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
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+ reg_addr = slot ? &SAC_REG_BASE : &PAC_REG_BASE;
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reg_addr += (reg >> 1);
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/* start read access across the ac97 link */
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GSR = GSR_CDONE | GSR_SDONE;
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gsr_bits = 0;
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- val = *reg_addr;
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+ val = (*reg_addr & 0xffff);
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if (reg == AC97_GPIO_STATUS)
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goto out;
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if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
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!((GSR | gsr_bits) & GSR_SDONE)) {
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printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
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__func__, reg, GSR | gsr_bits);
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- val = -1;
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+ val = -ETIMEDOUT;
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goto out;
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}
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/* valid data now */
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GSR = GSR_CDONE | GSR_SDONE;
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gsr_bits = 0;
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- val = *reg_addr;
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+ val = (*reg_addr & 0xffff);
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/* but we've just started another cycle... */
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wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
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@@ -86,29 +88,32 @@ out: mutex_unlock(&car_mutex);
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}
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EXPORT_SYMBOL_GPL(pxa2xx_ac97_read);
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-void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
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- unsigned short val)
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+int pxa2xx_ac97_write(int slot, unsigned short reg, unsigned short val)
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{
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volatile u32 *reg_addr;
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+ int ret = 0;
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mutex_lock(&car_mutex);
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/* set up primary or secondary codec space */
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if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
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- reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
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+ reg_addr = slot ? &SMC_REG_BASE : &PMC_REG_BASE;
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else
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- reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
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+ reg_addr = slot ? &SAC_REG_BASE : &PAC_REG_BASE;
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reg_addr += (reg >> 1);
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GSR = GSR_CDONE | GSR_SDONE;
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gsr_bits = 0;
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*reg_addr = val;
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if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
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- !((GSR | gsr_bits) & GSR_CDONE))
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+ !((GSR | gsr_bits) & GSR_CDONE)) {
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printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
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__func__, reg, GSR | gsr_bits);
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+ ret = -EIO;
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+ }
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mutex_unlock(&car_mutex);
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+ return ret;
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}
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EXPORT_SYMBOL_GPL(pxa2xx_ac97_write);
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@@ -188,7 +193,7 @@ static inline void pxa_ac97_cold_pxa3xx(void)
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}
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#endif
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-bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97)
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+bool pxa2xx_ac97_try_warm_reset(void)
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{
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unsigned long gsr;
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unsigned int timeout = 100;
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@@ -225,7 +230,7 @@ bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97)
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}
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EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_warm_reset);
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-bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97)
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+bool pxa2xx_ac97_try_cold_reset(void)
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{
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unsigned long gsr;
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unsigned int timeout = 1000;
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@@ -263,7 +268,7 @@ bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97)
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EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_cold_reset);
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-void pxa2xx_ac97_finish_reset(struct snd_ac97 *ac97)
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+void pxa2xx_ac97_finish_reset(void)
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{
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GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
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GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
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