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@@ -1433,13 +1433,16 @@ KVM_ASSIGN_DEV_IRQ. Partial deassignment of host or guest IRQ is allowed.
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4.52 KVM_SET_GSI_ROUTING
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4.52 KVM_SET_GSI_ROUTING
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Capability: KVM_CAP_IRQ_ROUTING
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Capability: KVM_CAP_IRQ_ROUTING
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-Architectures: x86 s390
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+Architectures: x86 s390 arm arm64
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Type: vm ioctl
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Type: vm ioctl
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Parameters: struct kvm_irq_routing (in)
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Parameters: struct kvm_irq_routing (in)
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Returns: 0 on success, -1 on error
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Returns: 0 on success, -1 on error
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Sets the GSI routing table entries, overwriting any previously set entries.
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Sets the GSI routing table entries, overwriting any previously set entries.
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+On arm/arm64, GSI routing has the following limitation:
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+- GSI routing does not apply to KVM_IRQ_LINE but only to KVM_IRQFD.
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+
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struct kvm_irq_routing {
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struct kvm_irq_routing {
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__u32 nr;
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__u32 nr;
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__u32 flags;
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__u32 flags;
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@@ -1468,7 +1471,13 @@ struct kvm_irq_routing_entry {
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#define KVM_IRQ_ROUTING_S390_ADAPTER 3
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#define KVM_IRQ_ROUTING_S390_ADAPTER 3
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#define KVM_IRQ_ROUTING_HV_SINT 4
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#define KVM_IRQ_ROUTING_HV_SINT 4
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-No flags are specified so far, the corresponding field must be set to zero.
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+flags:
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+- KVM_MSI_VALID_DEVID: used along with KVM_IRQ_ROUTING_MSI routing entry
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+ type, specifies that the devid field contains a valid value. The per-VM
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+ KVM_CAP_MSI_DEVID capability advertises the requirement to provide
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+ the device ID. If this capability is not available, userspace should
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+ never set the KVM_MSI_VALID_DEVID flag as the ioctl might fail.
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+- zero otherwise
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struct kvm_irq_routing_irqchip {
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struct kvm_irq_routing_irqchip {
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__u32 irqchip;
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__u32 irqchip;
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@@ -1479,9 +1488,16 @@ struct kvm_irq_routing_msi {
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__u32 address_lo;
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__u32 address_lo;
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__u32 address_hi;
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__u32 address_hi;
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__u32 data;
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__u32 data;
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- __u32 pad;
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+ union {
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+ __u32 pad;
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+ __u32 devid;
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+ };
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};
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};
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+If KVM_MSI_VALID_DEVID is set, devid contains a unique device identifier
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+for the device that wrote the MSI message. For PCI, this is usually a
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+BFD identifier in the lower 16 bits.
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+
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On x86, address_hi is ignored unless the KVM_X2APIC_API_USE_32BIT_IDS
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On x86, address_hi is ignored unless the KVM_X2APIC_API_USE_32BIT_IDS
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feature of KVM_CAP_X2APIC_API capability is enabled. If it is enabled,
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feature of KVM_CAP_X2APIC_API capability is enabled. If it is enabled,
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address_hi bits 31-8 provide bits 31-8 of the destination id. Bits 7-0 of
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address_hi bits 31-8 provide bits 31-8 of the destination id. Bits 7-0 of
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@@ -2199,14 +2215,14 @@ struct kvm_msi {
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__u8 pad[12];
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__u8 pad[12];
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};
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};
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-flags: KVM_MSI_VALID_DEVID: devid contains a valid value
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-devid: If KVM_MSI_VALID_DEVID is set, contains a unique device identifier
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- for the device that wrote the MSI message.
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- For PCI, this is usually a BFD identifier in the lower 16 bits.
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+flags: KVM_MSI_VALID_DEVID: devid contains a valid value. The per-VM
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+ KVM_CAP_MSI_DEVID capability advertises the requirement to provide
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+ the device ID. If this capability is not available, userspace
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+ should never set the KVM_MSI_VALID_DEVID flag as the ioctl might fail.
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-The per-VM KVM_CAP_MSI_DEVID capability advertises the need to provide
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-the device ID. If this capability is not set, userland cannot rely on
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-the kernel to allow the KVM_MSI_VALID_DEVID flag being set.
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+If KVM_MSI_VALID_DEVID is set, devid contains a unique device identifier
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+for the device that wrote the MSI message. For PCI, this is usually a
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+BFD identifier in the lower 16 bits.
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On x86, address_hi is ignored unless the KVM_CAP_X2APIC_API capability is
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On x86, address_hi is ignored unless the KVM_CAP_X2APIC_API capability is
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enabled. If it is enabled, address_hi bits 31-8 provide bits 31-8 of the
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enabled. If it is enabled, address_hi bits 31-8 provide bits 31-8 of the
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@@ -2383,9 +2399,13 @@ Note that closing the resamplefd is not sufficient to disable the
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irqfd. The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment
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irqfd. The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment
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and need not be specified with KVM_IRQFD_FLAG_DEASSIGN.
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and need not be specified with KVM_IRQFD_FLAG_DEASSIGN.
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-On ARM/ARM64, the gsi field in the kvm_irqfd struct specifies the Shared
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-Peripheral Interrupt (SPI) index, such that the GIC interrupt ID is
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-given by gsi + 32.
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+On arm/arm64, gsi routing being supported, the following can happen:
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+- in case no routing entry is associated to this gsi, injection fails
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+- in case the gsi is associated to an irqchip routing entry,
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+ irqchip.pin + 32 corresponds to the injected SPI ID.
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+- in case the gsi is associated to an MSI routing entry, the MSI
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+ message and device ID are translated into an LPI (support restricted
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+ to GICv3 ITS in-kernel emulation).
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4.76 KVM_PPC_ALLOCATE_HTAB
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4.76 KVM_PPC_ALLOCATE_HTAB
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