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@@ -406,7 +406,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
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.align
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.align
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.globl cpu_xsc3_suspend_size
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.globl cpu_xsc3_suspend_size
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-.equ cpu_xsc3_suspend_size, 4 * 8
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+.equ cpu_xsc3_suspend_size, 4 * 7
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#ifdef CONFIG_PM_SLEEP
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#ifdef CONFIG_PM_SLEEP
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ENTRY(cpu_xsc3_do_suspend)
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ENTRY(cpu_xsc3_do_suspend)
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stmfd sp!, {r4 - r10, lr}
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stmfd sp!, {r4 - r10, lr}
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@@ -418,12 +418,12 @@ ENTRY(cpu_xsc3_do_suspend)
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mrc p15, 0, r9, c1, c0, 1 @ auxiliary control reg
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mrc p15, 0, r9, c1, c0, 1 @ auxiliary control reg
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mrc p15, 0, r10, c1, c0, 0 @ control reg
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mrc p15, 0, r10, c1, c0, 0 @ control reg
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bic r4, r4, #2 @ clear frequency change bit
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bic r4, r4, #2 @ clear frequency change bit
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- stmia r0, {r1, r4 - r10} @ store v:p offset + cp regs
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+ stmia r0, {r4 - r10} @ store cp regs
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ldmia sp!, {r4 - r10, pc}
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ldmia sp!, {r4 - r10, pc}
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ENDPROC(cpu_xsc3_do_suspend)
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ENDPROC(cpu_xsc3_do_suspend)
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ENTRY(cpu_xsc3_do_resume)
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ENTRY(cpu_xsc3_do_resume)
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- ldmia r0, {r1, r4 - r10} @ load v:p offset + cp regs
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+ ldmia r0, {r4 - r10} @ load cp regs
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mov ip, #0
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mov ip, #0
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mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
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mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
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mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
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mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
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