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drm/amdgpu: count fences from all uvd instances in idle handler

Current multi-UVD hardware uses a single clock and power source
so handle all instances in the idle handler.

Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher 7 жил өмнө
parent
commit
6f0fd91947

+ 5 - 1
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

@@ -1146,7 +1146,11 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
 {
 {
 	struct amdgpu_device *adev =
 	struct amdgpu_device *adev =
 		container_of(work, struct amdgpu_device, uvd.inst->idle_work.work);
 		container_of(work, struct amdgpu_device, uvd.inst->idle_work.work);
-	unsigned fences = amdgpu_fence_count_emitted(&adev->uvd.inst->ring);
+	unsigned fences = 0, i;
+
+	for (i = 0; i < adev->uvd.num_uvd_inst; ++i) {
+		fences += amdgpu_fence_count_emitted(&adev->uvd.inst[i].ring);
+	}
 
 
 	if (fences == 0) {
 	if (fences == 0) {
 		if (adev->pm.dpm_enabled) {
 		if (adev->pm.dpm_enabled) {