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@@ -310,7 +310,7 @@ static int vsc85xx_mdix_set(struct phy_device *phydev, u8 mdix)
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DISABLE_HP_AUTO_MDIX_MASK);
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}
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rc = phy_write(phydev, MSCC_PHY_BYPASS_CONTROL, reg_val);
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- if (rc != 0)
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+ if (rc)
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return rc;
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reg_val = 0;
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@@ -425,14 +425,14 @@ static int vsc85xx_wol_set(struct phy_device *phydev,
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reg_val = phy_read(phydev, MII_VSC85XX_INT_MASK);
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reg_val |= MII_VSC85XX_INT_MASK_WOL;
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rc = phy_write(phydev, MII_VSC85XX_INT_MASK, reg_val);
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- if (rc != 0)
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+ if (rc)
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goto out_unlock;
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} else {
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/* Disable the WOL interrupt */
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reg_val = phy_read(phydev, MII_VSC85XX_INT_MASK);
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reg_val &= (~MII_VSC85XX_INT_MASK_WOL);
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rc = phy_write(phydev, MII_VSC85XX_INT_MASK, reg_val);
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- if (rc != 0)
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+ if (rc)
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goto out_unlock;
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}
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/* Clear WOL iterrupt status */
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@@ -603,7 +603,7 @@ static int vsc85xx_mac_if_set(struct phy_device *phydev,
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goto out_unlock;
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}
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rc = phy_write(phydev, MSCC_PHY_EXT_PHY_CNTL_1, reg_val);
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- if (rc != 0)
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+ if (rc)
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goto out_unlock;
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rc = genphy_soft_reset(phydev);
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