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@@ -58,6 +58,7 @@
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#define MII_M1011_PHY_SCR 0x10
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#define MII_M1011_PHY_SCR 0x10
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#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
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#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
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#define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
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#define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
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+#define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
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#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
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#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
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#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
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#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
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#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
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#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
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@@ -263,6 +264,23 @@ static int marvell_set_polarity(struct phy_device *phydev, int polarity)
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return 0;
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return 0;
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}
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}
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+static int marvell_set_downshift(struct phy_device *phydev, bool enable,
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+ u8 retries)
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+{
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+ int reg;
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+
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+ reg = phy_read(phydev, MII_M1011_PHY_SCR);
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+ if (reg < 0)
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+ return reg;
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+
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+ reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
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+ reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
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+ if (enable)
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+ reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
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+
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+ return phy_write(phydev, MII_M1011_PHY_SCR, reg);
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+}
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+
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static int marvell_config_aneg(struct phy_device *phydev)
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static int marvell_config_aneg(struct phy_device *phydev)
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{
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{
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int err;
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int err;
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@@ -643,7 +661,6 @@ static int marvell_config_init(struct phy_device *phydev)
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static int m88e1116r_config_init(struct phy_device *phydev)
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static int m88e1116r_config_init(struct phy_device *phydev)
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{
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{
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- int temp;
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int err;
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int err;
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err = genphy_soft_reset(phydev);
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err = genphy_soft_reset(phydev);
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@@ -660,10 +677,7 @@ static int m88e1116r_config_init(struct phy_device *phydev)
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if (err < 0)
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if (err < 0)
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return err;
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return err;
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- temp = phy_read(phydev, MII_M1011_PHY_SCR);
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- temp |= (7 << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
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- temp |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
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- err = phy_write(phydev, MII_M1011_PHY_SCR, temp);
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+ err = marvell_set_downshift(phydev, true, 8);
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if (err < 0)
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if (err < 0)
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return err;
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return err;
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