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@@ -61,7 +61,7 @@ static phys_addr_t dram_sync_paddr;
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static u32 dram_sync_size;
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/*
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- * The OMAP4 bus structure contains asynchrnous bridges which can buffer
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+ * The OMAP4 bus structure contains asynchronous bridges which can buffer
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* data writes from the MPU. These asynchronous bridges can be found on
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* paths between the MPU to EMIF, and the MPU to L3 interconnects.
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*
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