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@@ -1048,14 +1048,17 @@ static int vcn_v1_0_process_interrupt(struct amdgpu_device *adev,
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return 0;
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}
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-static void vcn_v1_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
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+static void vcn_v1_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
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{
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- int i;
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struct amdgpu_device *adev = ring->adev;
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+ int i;
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- for (i = 0; i < count; i++)
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- amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0));
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+ WARN_ON(ring->wptr % 2 || count % 2);
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+ for (i = 0; i < count / 2; i++) {
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+ amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0));
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+ amdgpu_ring_write(ring, 0);
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+ }
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}
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@@ -1082,7 +1085,6 @@ static const struct amd_ip_funcs vcn_v1_0_ip_funcs = {
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static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
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.type = AMDGPU_RING_TYPE_VCN_DEC,
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.align_mask = 0xf,
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- .nop = PACKET0(0x81ff, 0),
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.support_64bit_ptrs = false,
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.vmhub = AMDGPU_MMHUB,
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.get_rptr = vcn_v1_0_dec_ring_get_rptr,
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@@ -1101,7 +1103,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
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.emit_vm_flush = vcn_v1_0_dec_ring_emit_vm_flush,
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.test_ring = amdgpu_vcn_dec_ring_test_ring,
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.test_ib = amdgpu_vcn_dec_ring_test_ib,
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- .insert_nop = vcn_v1_0_ring_insert_nop,
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+ .insert_nop = vcn_v1_0_dec_ring_insert_nop,
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.insert_start = vcn_v1_0_dec_ring_insert_start,
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.insert_end = vcn_v1_0_dec_ring_insert_end,
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.pad_ib = amdgpu_ring_generic_pad_ib,
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