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@@ -1871,7 +1871,7 @@ int ci_mc_load_microcode(struct radeon_device *rdev)
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{
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const __be32 *fw_data = NULL;
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const __le32 *new_fw_data = NULL;
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- u32 running, blackout = 0, tmp;
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+ u32 running, tmp;
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u32 *io_mc_regs = NULL;
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const __le32 *new_io_mc_regs = NULL;
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int i, regs_size, ucode_size;
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@@ -1912,11 +1912,6 @@ int ci_mc_load_microcode(struct radeon_device *rdev)
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running = RREG32(MC_SEQ_SUP_CNTL) & RUN_MASK;
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if (running == 0) {
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- if (running) {
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- blackout = RREG32(MC_SHARED_BLACKOUT_CNTL);
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- WREG32(MC_SHARED_BLACKOUT_CNTL, blackout | 1);
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- }
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-
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/* reset the engine and set to writable */
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WREG32(MC_SEQ_SUP_CNTL, 0x00000008);
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WREG32(MC_SEQ_SUP_CNTL, 0x00000010);
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@@ -1964,9 +1959,6 @@ int ci_mc_load_microcode(struct radeon_device *rdev)
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break;
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udelay(1);
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}
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-
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- if (running)
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- WREG32(MC_SHARED_BLACKOUT_CNTL, blackout);
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}
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return 0;
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