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@@ -437,6 +437,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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{
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unsigned gpio, bank;
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int irq;
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+ int ret;
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struct clk *clk;
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u32 binten = 0;
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unsigned ngpio, bank_irq;
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@@ -480,12 +481,15 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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PTR_ERR(clk));
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return PTR_ERR(clk);
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}
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- clk_prepare_enable(clk);
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+ ret = clk_prepare_enable(clk);
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+ if (ret)
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+ return ret;
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if (!pdata->gpio_unbanked) {
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irq = devm_irq_alloc_descs(dev, -1, 0, ngpio, 0);
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if (irq < 0) {
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dev_err(dev, "Couldn't allocate IRQ numbers\n");
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+ clk_disable_unprepare(clk);
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return irq;
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}
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@@ -494,6 +498,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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chips);
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if (!irq_domain) {
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dev_err(dev, "Couldn't register an IRQ domain\n");
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+ clk_disable_unprepare(clk);
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return -ENODEV;
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}
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}
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@@ -562,8 +567,10 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
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sizeof(struct
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davinci_gpio_irq_data),
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GFP_KERNEL);
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- if (!irqdata)
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+ if (!irqdata) {
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+ clk_disable_unprepare(clk);
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return -ENOMEM;
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+ }
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irqdata->regs = g;
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irqdata->bank_num = bank;
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