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@@ -153,7 +153,7 @@ static void pcie_wait_cmd(struct controller *ctrl, int poll)
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* @cmd: command value written to slot control register
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* @cmd: command value written to slot control register
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* @mask: bitmask of slot control register to be modified
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* @mask: bitmask of slot control register to be modified
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*/
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*/
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-static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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+static void pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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{
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{
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struct pci_dev *pdev = ctrl_dev(ctrl);
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struct pci_dev *pdev = ctrl_dev(ctrl);
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u16 slot_status;
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u16 slot_status;
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@@ -208,7 +208,6 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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pcie_wait_cmd(ctrl, poll);
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pcie_wait_cmd(ctrl, poll);
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}
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}
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mutex_unlock(&ctrl->ctrl_lock);
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mutex_unlock(&ctrl->ctrl_lock);
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- return 0;
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}
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}
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static bool check_link_active(struct controller *ctrl)
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static bool check_link_active(struct controller *ctrl)
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@@ -342,7 +341,7 @@ static int pciehp_link_disable(struct controller *ctrl)
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return __pciehp_link_set(ctrl, false);
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return __pciehp_link_set(ctrl, false);
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}
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}
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-int pciehp_get_attention_status(struct slot *slot, u8 *status)
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+void pciehp_get_attention_status(struct slot *slot, u8 *status)
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{
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{
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struct controller *ctrl = slot->ctrl;
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struct controller *ctrl = slot->ctrl;
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struct pci_dev *pdev = ctrl_dev(ctrl);
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struct pci_dev *pdev = ctrl_dev(ctrl);
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@@ -372,11 +371,9 @@ int pciehp_get_attention_status(struct slot *slot, u8 *status)
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*status = 0xFF;
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*status = 0xFF;
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break;
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break;
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}
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}
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-
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- return 0;
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}
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}
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-int pciehp_get_power_status(struct slot *slot, u8 *status)
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+void pciehp_get_power_status(struct slot *slot, u8 *status)
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{
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{
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struct controller *ctrl = slot->ctrl;
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struct controller *ctrl = slot->ctrl;
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struct pci_dev *pdev = ctrl_dev(ctrl);
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struct pci_dev *pdev = ctrl_dev(ctrl);
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@@ -400,28 +397,24 @@ int pciehp_get_power_status(struct slot *slot, u8 *status)
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*status = 0xFF;
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*status = 0xFF;
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break;
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break;
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}
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}
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-
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- return 0;
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}
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}
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-int pciehp_get_latch_status(struct slot *slot, u8 *status)
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+void pciehp_get_latch_status(struct slot *slot, u8 *status)
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{
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{
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struct pci_dev *pdev = ctrl_dev(slot->ctrl);
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struct pci_dev *pdev = ctrl_dev(slot->ctrl);
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u16 slot_status;
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u16 slot_status;
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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*status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS);
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*status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS);
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- return 0;
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}
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}
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-int pciehp_get_adapter_status(struct slot *slot, u8 *status)
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+void pciehp_get_adapter_status(struct slot *slot, u8 *status)
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{
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{
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struct pci_dev *pdev = ctrl_dev(slot->ctrl);
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struct pci_dev *pdev = ctrl_dev(slot->ctrl);
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u16 slot_status;
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u16 slot_status;
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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*status = !!(slot_status & PCI_EXP_SLTSTA_PDS);
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*status = !!(slot_status & PCI_EXP_SLTSTA_PDS);
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- return 0;
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}
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}
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int pciehp_query_power_fault(struct slot *slot)
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int pciehp_query_power_fault(struct slot *slot)
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@@ -433,7 +426,7 @@ int pciehp_query_power_fault(struct slot *slot)
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return !!(slot_status & PCI_EXP_SLTSTA_PFD);
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return !!(slot_status & PCI_EXP_SLTSTA_PFD);
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}
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}
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-int pciehp_set_attention_status(struct slot *slot, u8 value)
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+void pciehp_set_attention_status(struct slot *slot, u8 value)
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{
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{
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struct controller *ctrl = slot->ctrl;
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struct controller *ctrl = slot->ctrl;
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u16 slot_cmd;
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u16 slot_cmd;
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@@ -451,11 +444,11 @@ int pciehp_set_attention_status(struct slot *slot, u8 value)
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slot_cmd = 0x0080;
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slot_cmd = 0x0080;
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break;
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break;
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default:
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default:
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- return -EINVAL;
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+ return;
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}
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}
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
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- return pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
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+ pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
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}
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}
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void pciehp_green_led_on(struct slot *slot)
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void pciehp_green_led_on(struct slot *slot)
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@@ -515,11 +508,7 @@ int pciehp_power_on_slot(struct slot * slot)
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slot_cmd = POWER_ON;
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slot_cmd = POWER_ON;
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cmd_mask = PCI_EXP_SLTCTL_PCC;
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cmd_mask = PCI_EXP_SLTCTL_PCC;
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- retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
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- if (retval) {
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- ctrl_err(ctrl, "Write %x command failed!\n", slot_cmd);
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- return retval;
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- }
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+ pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
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@@ -530,12 +519,11 @@ int pciehp_power_on_slot(struct slot * slot)
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return retval;
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return retval;
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}
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}
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-int pciehp_power_off_slot(struct slot * slot)
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+void pciehp_power_off_slot(struct slot * slot)
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{
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{
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struct controller *ctrl = slot->ctrl;
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struct controller *ctrl = slot->ctrl;
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u16 slot_cmd;
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u16 slot_cmd;
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u16 cmd_mask;
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u16 cmd_mask;
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- int retval;
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/* Disable the link at first */
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/* Disable the link at first */
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pciehp_link_disable(ctrl);
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pciehp_link_disable(ctrl);
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@@ -547,14 +535,9 @@ int pciehp_power_off_slot(struct slot * slot)
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slot_cmd = POWER_OFF;
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slot_cmd = POWER_OFF;
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cmd_mask = PCI_EXP_SLTCTL_PCC;
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cmd_mask = PCI_EXP_SLTCTL_PCC;
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- retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
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- if (retval) {
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- ctrl_err(ctrl, "Write command failed!\n");
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- return retval;
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- }
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+ pcie_write_cmd(ctrl, slot_cmd, cmd_mask);
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);
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- return 0;
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}
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}
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static irqreturn_t pcie_isr(int irq, void *dev_id)
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static irqreturn_t pcie_isr(int irq, void *dev_id)
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@@ -617,7 +600,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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-int pcie_enable_notification(struct controller *ctrl)
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+void pcie_enable_notification(struct controller *ctrl)
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{
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{
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u16 cmd, mask;
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u16 cmd, mask;
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@@ -643,22 +626,18 @@ int pcie_enable_notification(struct controller *ctrl)
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PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE |
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PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE |
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PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE);
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PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE);
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- if (pcie_write_cmd(ctrl, cmd, mask)) {
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- ctrl_err(ctrl, "Cannot enable software notification\n");
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- return -1;
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- }
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- return 0;
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+ pcie_write_cmd(ctrl, cmd, mask);
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}
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}
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static void pcie_disable_notification(struct controller *ctrl)
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static void pcie_disable_notification(struct controller *ctrl)
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{
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{
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u16 mask;
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u16 mask;
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+
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mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE |
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mask = (PCI_EXP_SLTCTL_PDCE | PCI_EXP_SLTCTL_ABPE |
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PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE |
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PCI_EXP_SLTCTL_MRLSCE | PCI_EXP_SLTCTL_PFDE |
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PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE |
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PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE |
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PCI_EXP_SLTCTL_DLLSCE);
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PCI_EXP_SLTCTL_DLLSCE);
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- if (pcie_write_cmd(ctrl, 0, mask))
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- ctrl_warn(ctrl, "Cannot disable software notification\n");
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+ pcie_write_cmd(ctrl, 0, mask);
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}
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}
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/*
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/*
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@@ -698,10 +677,7 @@ int pcie_init_notification(struct controller *ctrl)
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{
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{
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if (pciehp_request_irq(ctrl))
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if (pciehp_request_irq(ctrl))
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return -1;
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return -1;
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- if (pcie_enable_notification(ctrl)) {
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- pciehp_free_irq(ctrl);
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- return -1;
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- }
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+ pcie_enable_notification(ctrl);
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ctrl->notification_enabled = 1;
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ctrl->notification_enabled = 1;
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return 0;
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return 0;
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}
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}
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