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ARM: tegra: Enable IOMMU for display controllers on Tegra30

Add iommus properties to the device tree nodes for the two display
controllers found on Tegra30. This will allow the display controllers to
map physically non-contiguous buffers to I/O virtual contiguous address
spaces so that they can be used for scan-out.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding 11 years ago
parent
commit
6d9adf6f00
1 changed files with 5 additions and 0 deletions
  1. 5 0
      arch/arm/boot/dts/tegra30.dtsi

+ 5 - 0
arch/arm/boot/dts/tegra30.dtsi

@@ -1,5 +1,6 @@
 #include <dt-bindings/clock/tegra30-car.h>
 #include <dt-bindings/clock/tegra30-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra30-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 
@@ -174,6 +175,8 @@
 			resets = <&tegra_car 27>;
 			resets = <&tegra_car 27>;
 			reset-names = "dc";
 			reset-names = "dc";
 
 
+			iommus = <&mc TEGRA_SWGROUP_DC>;
+
 			nvidia,head = <0>;
 			nvidia,head = <0>;
 
 
 			rgb {
 			rgb {
@@ -191,6 +194,8 @@
 			resets = <&tegra_car 26>;
 			resets = <&tegra_car 26>;
 			reset-names = "dc";
 			reset-names = "dc";
 
 
+			iommus = <&mc TEGRA_SWGROUP_DCB>;
+
 			nvidia,head = <1>;
 			nvidia,head = <1>;
 
 
 			rgb {
 			rgb {