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@@ -30,10 +30,12 @@
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#define PCIE8766_DEFAULT_FW_NAME "mrvl/pcie8766_uapsta.bin"
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#define PCIE8897_DEFAULT_FW_NAME "mrvl/pcie8897_uapsta.bin"
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+#define PCIE8997_DEFAULT_FW_NAME "mrvl/pcie8997_uapsta.bin"
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#define PCIE_VENDOR_ID_MARVELL (0x11ab)
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#define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30)
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#define PCIE_DEVICE_ID_MARVELL_88W8897 (0x2b38)
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+#define PCIE_DEVICE_ID_MARVELL_88W8997 (0x2b42)
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/* Constants for Buffer Descriptor (BD) rings */
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#define MWIFIEX_MAX_TXRX_BD 0x20
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@@ -197,7 +199,38 @@ static const struct mwifiex_pcie_card_reg mwifiex_reg_8897 = {
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.sleep_cookie = 0,
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.fw_dump_ctrl = 0xcf4,
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.fw_dump_start = 0xcf8,
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- .fw_dump_end = 0xcff
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+ .fw_dump_end = 0xcff,
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+};
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+
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+static const struct mwifiex_pcie_card_reg mwifiex_reg_8997 = {
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+ .cmd_addr_lo = PCIE_SCRATCH_0_REG,
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+ .cmd_addr_hi = PCIE_SCRATCH_1_REG,
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+ .cmd_size = PCIE_SCRATCH_2_REG,
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+ .fw_status = PCIE_SCRATCH_3_REG,
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+ .cmdrsp_addr_lo = PCIE_SCRATCH_4_REG,
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+ .cmdrsp_addr_hi = PCIE_SCRATCH_5_REG,
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+ .tx_rdptr = 0xC1A4,
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+ .tx_wrptr = 0xC1A8,
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+ .rx_rdptr = 0xC1A8,
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+ .rx_wrptr = 0xC1A4,
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+ .evt_rdptr = PCIE_SCRATCH_10_REG,
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+ .evt_wrptr = PCIE_SCRATCH_11_REG,
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+ .drv_rdy = PCIE_SCRATCH_12_REG,
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+ .tx_start_ptr = 16,
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+ .tx_mask = 0x0FFF0000,
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+ .tx_wrap_mask = 0x01FF0000,
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+ .rx_mask = 0x00000FFF,
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+ .rx_wrap_mask = 0x000001FF,
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+ .tx_rollover_ind = BIT(28),
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+ .rx_rollover_ind = BIT(12),
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+ .evt_rollover_ind = MWIFIEX_BD_FLAG_EVT_ROLLOVER_IND,
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+ .ring_flag_sop = MWIFIEX_BD_FLAG_SOP,
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+ .ring_flag_eop = MWIFIEX_BD_FLAG_EOP,
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+ .ring_flag_xs_sop = MWIFIEX_BD_FLAG_XS_SOP,
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+ .ring_flag_xs_eop = MWIFIEX_BD_FLAG_XS_EOP,
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+ .ring_tx_start_ptr = MWIFIEX_BD_FLAG_TX_START_PTR,
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+ .pfu_enabled = 1,
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+ .sleep_cookie = 0,
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};
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struct mwifiex_pcie_device {
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@@ -227,6 +260,15 @@ static const struct mwifiex_pcie_device mwifiex_pcie8897 = {
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.can_ext_scan = true,
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};
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+static const struct mwifiex_pcie_device mwifiex_pcie8997 = {
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+ .firmware = PCIE8997_DEFAULT_FW_NAME,
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+ .reg = &mwifiex_reg_8997,
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+ .blksz_fw_dl = MWIFIEX_PCIE_BLOCK_SIZE_FW_DNLD,
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+ .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
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+ .can_dump_fw = false,
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+ .can_ext_scan = true,
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+};
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+
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struct mwifiex_evt_buf_desc {
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u64 paddr;
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u16 len;
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@@ -325,6 +367,7 @@ mwifiex_pcie_txbd_not_full(struct pcie_service_card *card)
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return 1;
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break;
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case PCIE_DEVICE_ID_MARVELL_88W8897:
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+ case PCIE_DEVICE_ID_MARVELL_88W8997:
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if (((card->txbd_wrptr & reg->tx_mask) !=
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(card->txbd_rdptr & reg->tx_mask)) ||
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((card->txbd_wrptr & reg->tx_rollover_ind) ==
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