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@@ -631,8 +631,10 @@ static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset)
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*/
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wmb();
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- writel(mmio_read_reg, ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF);
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+ writel_relaxed(mmio_read_reg,
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+ ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF);
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+ mmiowb();
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for (i = 0; i < timeout; i++) {
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if (read_resp->req_id == mmio_read->seq_num)
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break;
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@@ -1826,7 +1828,9 @@ void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data)
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/* write the aenq doorbell after all AENQ descriptors were read */
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mb();
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- writel((u32)aenq->head, dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);
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+ writel_relaxed((u32)aenq->head,
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+ dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);
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+ mmiowb();
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}
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int ena_com_dev_reset(struct ena_com_dev *ena_dev,
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