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@@ -1648,7 +1648,7 @@ static void gfx_v7_0_setup_rb(struct amdgpu_device *adev,
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u32 max_rb_num_per_se)
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{
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int i, j;
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- u32 data, mask;
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+ u32 data;
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u32 disabled_rbs = 0;
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u32 enabled_rbs = 0;
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@@ -1666,12 +1666,7 @@ static void gfx_v7_0_setup_rb(struct amdgpu_device *adev,
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gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff);
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mutex_unlock(&adev->grbm_idx_mutex);
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- mask = 1;
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- for (i = 0; i < max_rb_num_per_se * se_num; i++) {
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- if (!(disabled_rbs & mask))
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- enabled_rbs |= mask;
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- mask <<= 1;
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- }
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+ enabled_rbs = (~disabled_rbs) & ((1UL<<(max_rb_num_per_se*se_num))-1);
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adev->gfx.config.backend_enable_mask = enabled_rbs;
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