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@@ -28,6 +28,7 @@
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#define PT_MIPS_REGINFO 0x70000000
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#define PT_MIPS_RTPROC 0x70000001
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#define PT_MIPS_OPTIONS 0x70000002
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+#define PT_MIPS_ABIFLAGS 0x70000003
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/* Flags in the e_flags field of the header */
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#define EF_MIPS_NOREORDER 0x00000001
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@@ -174,6 +175,30 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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typedef double elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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+struct mips_elf_abiflags_v0 {
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+ uint16_t version; /* Version of flags structure */
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+ uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
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+ uint8_t isa_rev; /* The revision of ISA: 0 for MIPS V and below,
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+ 1-n otherwise */
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+ uint8_t gpr_size; /* The size of general purpose registers */
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+ uint8_t cpr1_size; /* The size of co-processor 1 registers */
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+ uint8_t cpr2_size; /* The size of co-processor 2 registers */
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+ uint8_t fp_abi; /* The floating-point ABI */
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+ uint32_t isa_ext; /* Mask of processor-specific extensions */
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+ uint32_t ases; /* Mask of ASEs used */
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+ uint32_t flags1; /* Mask of general flags */
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+ uint32_t flags2;
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+};
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+
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+#define MIPS_ABI_FP_ANY 0 /* FP ABI doesn't matter */
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+#define MIPS_ABI_FP_DOUBLE 1 /* -mdouble-float */
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+#define MIPS_ABI_FP_SINGLE 2 /* -msingle-float */
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+#define MIPS_ABI_FP_SOFT 3 /* -msoft-float */
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+#define MIPS_ABI_FP_OLD_64 4 /* -mips32r2 -mfp64 */
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+#define MIPS_ABI_FP_XX 5 /* -mfpxx */
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+#define MIPS_ABI_FP_64 6 /* -mips32r2 -mfp64 */
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+#define MIPS_ABI_FP_64A 7 /* -mips32r2 -mfp64 -mno-odd-spreg */
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+
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#ifdef CONFIG_32BIT
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/*
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