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@@ -0,0 +1,267 @@
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+/*
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+ * Copyright 2017 IBM Corporation
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version
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+ * 2 of the License, or (at your option) any later version.
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+ */
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+
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+#include <linux/mfd/syscon.h>
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+#include <linux/miscdevice.h>
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+#include <linux/mm.h>
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+#include <linux/module.h>
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+#include <linux/of_address.h>
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+#include <linux/platform_device.h>
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+#include <linux/poll.h>
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+#include <linux/regmap.h>
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+
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+#include <linux/aspeed-lpc-ctrl.h>
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+
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+#define DEVICE_NAME "aspeed-lpc-ctrl"
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+
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+#define HICR7 0x8
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+#define HICR8 0xc
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+
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+struct aspeed_lpc_ctrl {
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+ struct miscdevice miscdev;
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+ struct regmap *regmap;
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+ phys_addr_t mem_base;
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+ resource_size_t mem_size;
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+ u32 pnor_size;
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+ u32 pnor_base;
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+};
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+
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+static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
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+{
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+ return container_of(file->private_data, struct aspeed_lpc_ctrl,
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+ miscdev);
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+}
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+
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+static int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
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+{
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+ struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
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+ unsigned long vsize = vma->vm_end - vma->vm_start;
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+ pgprot_t prot = vma->vm_page_prot;
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+
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+ if (vma->vm_pgoff + vsize > lpc_ctrl->mem_base + lpc_ctrl->mem_size)
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+ return -EINVAL;
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+
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+ /* ast2400/2500 AHB accesses are not cache coherent */
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+ prot = pgprot_dmacoherent(prot);
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+
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+ if (remap_pfn_range(vma, vma->vm_start,
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+ (lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
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+ vsize, prot))
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+ return -EAGAIN;
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+
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+ return 0;
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+}
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+
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+static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
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+ unsigned long param)
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+{
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+ struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
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+ void __user *p = (void __user *)param;
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+ struct aspeed_lpc_ctrl_mapping map;
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+ u32 addr;
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+ u32 size;
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+ long rc;
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+
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+ if (copy_from_user(&map, p, sizeof(map)))
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+ return -EFAULT;
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+
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+ if (map.flags != 0)
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+ return -EINVAL;
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+
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+ switch (cmd) {
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+ case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
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+ /* The flash windows don't report their size */
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+ if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
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+ return -EINVAL;
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+
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+ /* Support more than one window id in the future */
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+ if (map.window_id != 0)
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+ return -EINVAL;
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+
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+ map.size = lpc_ctrl->mem_size;
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+
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+ return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
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+ case ASPEED_LPC_CTRL_IOCTL_MAP:
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+
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+ /*
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+ * The top half of HICR7 is the MSB of the BMC address of the
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+ * mapping.
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+ * The bottom half of HICR7 is the MSB of the HOST LPC
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+ * firmware space address of the mapping.
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+ *
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+ * The 1 bits in the top of half of HICR8 represent the bits
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+ * (in the requested address) that should be ignored and
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+ * replaced with those from the top half of HICR7.
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+ * The 1 bits in the bottom half of HICR8 represent the bits
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+ * (in the requested address) that should be kept and pass
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+ * into the BMC address space.
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+ */
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+
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+ /*
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+ * It doesn't make sense to talk about a size or offset with
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+ * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
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+ * bits of addresses and sizes.
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+ */
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+
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+ if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
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+ return -EINVAL;
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+
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+ /*
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+ * Because of the way the masks work in HICR8 offset has to
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+ * be a multiple of size.
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+ */
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+ if (map.offset & (map.size - 1))
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+ return -EINVAL;
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+
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+ if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
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+ addr = lpc_ctrl->pnor_base;
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+ size = lpc_ctrl->pnor_size;
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+ } else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
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+ addr = lpc_ctrl->mem_base;
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+ size = lpc_ctrl->mem_size;
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+ } else {
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+ return -EINVAL;
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+ }
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+
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+ /* Check overflow first! */
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+ if (map.offset + map.size < map.offset ||
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+ map.offset + map.size > size)
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+ return -EINVAL;
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+
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+ if (map.size == 0 || map.size > size)
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+ return -EINVAL;
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+
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+ addr += map.offset;
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+
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+ /*
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+ * addr (host lpc address) is safe regardless of values. This
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+ * simply changes the address the host has to request on its
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+ * side of the LPC bus. This cannot impact the hosts own
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+ * memory space by surprise as LPC specific accessors are
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+ * required. The only strange thing that could be done is
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+ * setting the lower 16 bits but the shift takes care of that.
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+ */
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+
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+ rc = regmap_write(lpc_ctrl->regmap, HICR7,
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+ (addr | (map.addr >> 16)));
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+ if (rc)
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+ return rc;
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+
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+ return regmap_write(lpc_ctrl->regmap, HICR8,
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+ (~(map.size - 1)) | ((map.size >> 16) - 1));
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static const struct file_operations aspeed_lpc_ctrl_fops = {
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+ .owner = THIS_MODULE,
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+ .mmap = aspeed_lpc_ctrl_mmap,
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+ .unlocked_ioctl = aspeed_lpc_ctrl_ioctl,
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+};
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+
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+static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
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+{
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+ struct aspeed_lpc_ctrl *lpc_ctrl;
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+ struct device_node *node;
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+ struct resource resm;
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+ struct device *dev;
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+ int rc;
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+
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+ dev = &pdev->dev;
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+
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+ lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
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+ if (!lpc_ctrl)
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+ return -ENOMEM;
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+
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+ node = of_parse_phandle(dev->of_node, "flash", 0);
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+ if (!node) {
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+ dev_err(dev, "Didn't find host pnor flash node\n");
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+ return -ENODEV;
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+ }
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+
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+ rc = of_address_to_resource(node, 1, &resm);
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+ of_node_put(node);
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+ if (rc) {
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+ dev_err(dev, "Couldn't address to resource for flash\n");
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+ return rc;
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+ }
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+
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+ lpc_ctrl->pnor_size = resource_size(&resm);
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+ lpc_ctrl->pnor_base = resm.start;
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+
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+ dev_set_drvdata(&pdev->dev, lpc_ctrl);
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+
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+ node = of_parse_phandle(dev->of_node, "memory-region", 0);
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+ if (!node) {
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+ dev_err(dev, "Didn't find reserved memory\n");
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+ return -EINVAL;
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+ }
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+
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+ rc = of_address_to_resource(node, 0, &resm);
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+ of_node_put(node);
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+ if (rc) {
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+ dev_err(dev, "Couldn't address to resource for reserved memory\n");
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+ return -ENOMEM;
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+ }
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+
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+ lpc_ctrl->mem_size = resource_size(&resm);
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+ lpc_ctrl->mem_base = resm.start;
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+
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+ lpc_ctrl->regmap = syscon_node_to_regmap(
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+ pdev->dev.parent->of_node);
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+ if (IS_ERR(lpc_ctrl->regmap)) {
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+ dev_err(dev, "Couldn't get regmap\n");
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+ return -ENODEV;
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+ }
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+
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+ lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
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+ lpc_ctrl->miscdev.name = DEVICE_NAME;
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+ lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
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+ lpc_ctrl->miscdev.parent = dev;
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+ rc = misc_register(&lpc_ctrl->miscdev);
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+ if (rc)
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+ dev_err(dev, "Unable to register device\n");
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+ else
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+ dev_info(dev, "Loaded at 0x%08x (0x%08x)\n",
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+ lpc_ctrl->mem_base, lpc_ctrl->mem_size);
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+
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+ return rc;
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+}
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+
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+static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
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+{
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+ struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
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+
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+ misc_deregister(&lpc_ctrl->miscdev);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id aspeed_lpc_ctrl_match[] = {
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+ { .compatible = "aspeed,ast2400-lpc-ctrl" },
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+ { .compatible = "aspeed,ast2500-lpc-ctrl" },
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+ { },
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+};
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+
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+static struct platform_driver aspeed_lpc_ctrl_driver = {
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+ .driver = {
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+ .name = DEVICE_NAME,
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+ .of_match_table = aspeed_lpc_ctrl_match,
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+ },
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+ .probe = aspeed_lpc_ctrl_probe,
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+ .remove = aspeed_lpc_ctrl_remove,
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+};
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+
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+module_platform_driver(aspeed_lpc_ctrl_driver);
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+
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+MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
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+MODULE_LICENSE("GPL");
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+MODULE_AUTHOR("Cyril Bur <cyrilbur@gmail.com>");
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+MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");
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