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@@ -61,6 +61,20 @@ static u64 arc_read_gfrc(struct clocksource *cs)
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unsigned long flags;
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u32 l, h;
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+ /*
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+ * From a programming model pov, there seems to be just one instance of
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+ * MCIP_CMD/MCIP_READBACK however micro-architecturally there's
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+ * an instance PER ARC CORE (not per cluster), and there are dedicated
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+ * hardware decode logic (per core) inside ARConnect to handle
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+ * simultaneous read/write accesses from cores via those two registers.
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+ * So several concurrent commands to ARConnect are OK if they are
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+ * trying to access two different sub-components (like GFRC,
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+ * inter-core interrupt, etc...). HW also supports simultaneously
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+ * accessing GFRC by multiple cores.
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+ * That's why it is safe to disable hard interrupts on the local CPU
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+ * before access to GFRC instead of taking global MCIP spinlock
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+ * defined in arch/arc/kernel/mcip.c
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+ */
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local_irq_save(flags);
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__mcip_cmd(CMD_GFRC_READ_LO, 0);
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