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@@ -552,6 +552,59 @@ static struct stmpe_variant_info stmpe610 = {
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.get_altfunc = stmpe811_get_altfunc,
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};
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+/*
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+ * STMPE1600
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+ * Compared to all others STMPE variant, LSB and MSB regs are located in this
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+ * order : LSB addr
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+ * MSB addr + 1
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+ * As there is only 2 * 8bits registers for GPMR/GPSR/IEGPIOPR, CSB index is MSB registers
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+ */
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+
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+static const u8 stmpe1600_regs[] = {
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+ [STMPE_IDX_CHIP_ID] = STMPE1600_REG_CHIP_ID,
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+ [STMPE_IDX_SYS_CTRL] = STMPE1600_REG_SYS_CTRL,
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+ [STMPE_IDX_ICR_LSB] = STMPE1600_REG_SYS_CTRL,
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+ [STMPE_IDX_GPMR_LSB] = STMPE1600_REG_GPMR_LSB,
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+ [STMPE_IDX_GPMR_CSB] = STMPE1600_REG_GPMR_MSB,
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+ [STMPE_IDX_GPSR_LSB] = STMPE1600_REG_GPSR_LSB,
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+ [STMPE_IDX_GPSR_CSB] = STMPE1600_REG_GPSR_MSB,
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+ [STMPE_IDX_GPDR_LSB] = STMPE1600_REG_GPDR_LSB,
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+ [STMPE_IDX_GPDR_CSB] = STMPE1600_REG_GPDR_MSB,
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+ [STMPE_IDX_IEGPIOR_LSB] = STMPE1600_REG_IEGPIOR_LSB,
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+ [STMPE_IDX_IEGPIOR_CSB] = STMPE1600_REG_IEGPIOR_MSB,
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+ [STMPE_IDX_ISGPIOR_LSB] = STMPE1600_REG_ISGPIOR_LSB,
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+};
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+
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+static struct stmpe_variant_block stmpe1600_blocks[] = {
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+ {
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+ .cell = &stmpe_gpio_cell,
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+ .irq = 0,
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+ .block = STMPE_BLOCK_GPIO,
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+ },
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+};
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+
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+static int stmpe1600_enable(struct stmpe *stmpe, unsigned int blocks,
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+ bool enable)
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+{
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+ if (blocks & STMPE_BLOCK_GPIO)
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+ return 0;
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+ else
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+ return -EINVAL;
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+}
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+
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+static struct stmpe_variant_info stmpe1600 = {
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+ .name = "stmpe1600",
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+ .id_val = STMPE1600_ID,
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+ .id_mask = 0xffff,
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+ .num_gpios = 16,
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+ .af_bits = 0,
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+ .regs = stmpe1600_regs,
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+ .blocks = stmpe1600_blocks,
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+ .num_blocks = ARRAY_SIZE(stmpe1600_blocks),
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+ .num_irqs = STMPE1600_NR_INTERNAL_IRQS,
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+ .enable = stmpe1600_enable,
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+};
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+
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/*
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* STMPE1601
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*/
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@@ -949,6 +1002,7 @@ static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
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[STMPE610] = &stmpe610,
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[STMPE801] = &stmpe801,
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[STMPE811] = &stmpe811,
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+ [STMPE1600] = &stmpe1600,
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[STMPE1601] = &stmpe1601,
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[STMPE1801] = &stmpe1801,
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[STMPE2401] = &stmpe2401,
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@@ -975,7 +1029,8 @@ static irqreturn_t stmpe_irq(int irq, void *data)
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int ret;
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int i;
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- if (variant->id_val == STMPE801_ID) {
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+ if (variant->id_val == STMPE801_ID ||
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+ variant->id_val == STMPE1600_ID) {
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int base = irq_create_mapping(stmpe->domain, 0);
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handle_nested_irq(base);
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@@ -1149,13 +1204,13 @@ static int stmpe_chip_init(struct stmpe *stmpe)
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return ret;
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if (stmpe->irq >= 0) {
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- if (id == STMPE801_ID)
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+ if (id == STMPE801_ID || id == STMPE1600_ID)
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icr = STMPE_SYS_CTRL_INT_EN;
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else
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icr = STMPE_ICR_LSB_GIM;
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- /* STMPE801 doesn't support Edge interrupts */
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- if (id != STMPE801_ID) {
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+ /* STMPE801 and STMPE1600 don't support Edge interrupts */
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+ if (id != STMPE801_ID && id != STMPE1600_ID) {
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if (irq_trigger == IRQF_TRIGGER_FALLING ||
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irq_trigger == IRQF_TRIGGER_RISING)
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icr |= STMPE_ICR_LSB_EDGE;
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@@ -1163,7 +1218,7 @@ static int stmpe_chip_init(struct stmpe *stmpe)
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if (irq_trigger == IRQF_TRIGGER_RISING ||
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irq_trigger == IRQF_TRIGGER_HIGH) {
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- if (id == STMPE801_ID)
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+ if (id == STMPE801_ID || id == STMPE1600_ID)
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icr |= STMPE_SYS_CTRL_INT_HI;
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else
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icr |= STMPE_ICR_LSB_HIGH;
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