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@@ -167,7 +167,9 @@ LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the
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/* Array to assign indices to IOMMUs*/
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struct amd_iommu *amd_iommus[MAX_IOMMUS];
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-int amd_iommus_present;
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+
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+/* Number of IOMMUs present in the system */
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+static int amd_iommus_present;
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/* IOMMUs have a non-present cache? */
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bool amd_iommu_np_cache __read_mostly;
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@@ -272,6 +274,11 @@ static inline unsigned long tbl_size(int entry_size)
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return 1UL << shift;
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}
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+int amd_iommu_get_num_iommus(void)
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+{
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+ return amd_iommus_present;
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+}
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+
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/* Access to l1 and l2 indexed register spaces */
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static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address)
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@@ -1336,7 +1343,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
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/* Add IOMMU to internal data structures */
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list_add_tail(&iommu->list, &amd_iommu_list);
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- iommu->index = amd_iommus_present++;
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+ iommu->index = amd_iommus_present++;
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if (unlikely(iommu->index >= MAX_IOMMUS)) {
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WARN(1, "AMD-Vi: System has more IOMMUs than supported by this driver\n");
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