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@@ -41,7 +41,6 @@
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static const struct dwc2_core_params params_hi6220 = {
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static const struct dwc2_core_params params_hi6220 = {
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.otg_cap = 2, /* No HNP/SRP capable */
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.otg_cap = 2, /* No HNP/SRP capable */
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.otg_ver = 0, /* 1.3 */
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.otg_ver = 0, /* 1.3 */
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- .host_dma = 1,
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.dma_desc_enable = 0,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = 0, /* High Speed */
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.speed = 0, /* High Speed */
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@@ -73,7 +72,6 @@ static const struct dwc2_core_params params_hi6220 = {
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static const struct dwc2_core_params params_bcm2835 = {
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static const struct dwc2_core_params params_bcm2835 = {
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.otg_cap = 0, /* HNP/SRP capable */
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.otg_cap = 0, /* HNP/SRP capable */
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.otg_ver = 0, /* 1.3 */
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.otg_ver = 0, /* 1.3 */
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- .host_dma = 1,
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.dma_desc_enable = 0,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = 0, /* High Speed */
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.speed = 0, /* High Speed */
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@@ -104,7 +102,6 @@ static const struct dwc2_core_params params_bcm2835 = {
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static const struct dwc2_core_params params_rk3066 = {
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static const struct dwc2_core_params params_rk3066 = {
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.otg_cap = 2, /* non-HNP/non-SRP */
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.otg_cap = 2, /* non-HNP/non-SRP */
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.otg_ver = -1,
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.otg_ver = -1,
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- .host_dma = -1,
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.dma_desc_enable = 0,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = -1,
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.speed = -1,
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@@ -136,7 +133,6 @@ static const struct dwc2_core_params params_rk3066 = {
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static const struct dwc2_core_params params_ltq = {
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static const struct dwc2_core_params params_ltq = {
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.otg_cap = 2, /* non-HNP/non-SRP */
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.otg_cap = 2, /* non-HNP/non-SRP */
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.otg_ver = -1,
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.otg_ver = -1,
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- .host_dma = -1,
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.dma_desc_enable = -1,
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.dma_desc_enable = -1,
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.dma_desc_fs_enable = -1,
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.dma_desc_fs_enable = -1,
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.speed = -1,
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.speed = -1,
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@@ -168,7 +164,6 @@ static const struct dwc2_core_params params_ltq = {
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static const struct dwc2_core_params params_amlogic = {
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static const struct dwc2_core_params params_amlogic = {
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.otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
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.otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
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.otg_ver = -1,
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.otg_ver = -1,
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- .host_dma = 1,
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.dma_desc_enable = 0,
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.dma_desc_enable = 0,
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.dma_desc_fs_enable = 0,
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.dma_desc_fs_enable = 0,
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.speed = DWC2_SPEED_PARAM_HIGH,
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.speed = DWC2_SPEED_PARAM_HIGH,
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@@ -200,7 +195,6 @@ static const struct dwc2_core_params params_amlogic = {
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static const struct dwc2_core_params params_default = {
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static const struct dwc2_core_params params_default = {
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.otg_cap = -1,
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.otg_cap = -1,
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.otg_ver = -1,
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.otg_ver = -1,
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- .host_dma = -1,
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/*
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/*
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* Disable descriptor dma mode by default as the HW can support
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* Disable descriptor dma mode by default as the HW can support
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@@ -486,27 +480,6 @@ static void dwc2_set_param_otg_cap(struct dwc2_hsotg *hsotg, int val)
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hsotg->params.otg_cap = val;
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hsotg->params.otg_cap = val;
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}
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}
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-static void dwc2_set_param_host_dma(struct dwc2_hsotg *hsotg, int val)
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-{
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- int valid = 1;
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-
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- if (val > 0 && hsotg->hw_params.arch == GHWCFG2_SLAVE_ONLY_ARCH)
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- valid = 0;
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- if (val < 0)
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- valid = 0;
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-
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- if (!valid) {
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- if (val >= 0)
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- dev_err(hsotg->dev,
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- "%d invalid for host_dma parameter. Check HW configuration.\n",
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- val);
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- val = hsotg->hw_params.arch != GHWCFG2_SLAVE_ONLY_ARCH;
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- dev_dbg(hsotg->dev, "Setting host_dma to %d\n", val);
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- }
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-
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- hsotg->params.host_dma = val;
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-}
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-
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static void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val)
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static void dwc2_set_param_dma_desc_enable(struct dwc2_hsotg *hsotg, int val)
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{
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{
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int valid = 1;
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int valid = 1;
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@@ -1124,11 +1097,27 @@ static void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
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{
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{
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struct dwc2_hw_params *hw = &hsotg->hw_params;
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struct dwc2_hw_params *hw = &hsotg->hw_params;
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struct dwc2_core_params *p = &hsotg->params;
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struct dwc2_core_params *p = &hsotg->params;
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+ bool dma_capable = !(hw->arch == GHWCFG2_SLAVE_ONLY_ARCH);
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dwc2_set_param_otg_cap(hsotg, params->otg_cap);
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dwc2_set_param_otg_cap(hsotg, params->otg_cap);
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- dwc2_set_param_host_dma(hsotg, params->host_dma);
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dwc2_set_param_dma_desc_enable(hsotg, params->dma_desc_enable);
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dwc2_set_param_dma_desc_enable(hsotg, params->dma_desc_enable);
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dwc2_set_param_dma_desc_fs_enable(hsotg, params->dma_desc_fs_enable);
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dwc2_set_param_dma_desc_fs_enable(hsotg, params->dma_desc_fs_enable);
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+
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+ if ((hsotg->dr_mode == USB_DR_MODE_HOST) ||
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+ (hsotg->dr_mode == USB_DR_MODE_OTG)) {
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+ bool disable;
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+
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+ dev_dbg(hsotg->dev, "Setting HOST parameters\n");
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+
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+ disable = device_property_read_bool(hsotg->dev,
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+ "snps,host-dma-disable");
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+
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+ dwc2_set_param_bool(hsotg, &p->host_dma,
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+ false, "host-dma",
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+ !disable, false,
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+ dma_capable);
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+ }
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+
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dwc2_set_param_host_support_fs_ls_low_power(hsotg,
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dwc2_set_param_host_support_fs_ls_low_power(hsotg,
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params->host_support_fs_ls_low_power);
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params->host_support_fs_ls_low_power);
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dwc2_set_param_enable_dynamic_fifo(hsotg,
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dwc2_set_param_enable_dynamic_fifo(hsotg,
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@@ -1174,8 +1163,7 @@ static void dwc2_set_parameters(struct dwc2_hsotg *hsotg,
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dwc2_set_param_bool(hsotg, &p->g_dma, true, "g-use-dma",
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dwc2_set_param_bool(hsotg, &p->g_dma, true, "g-use-dma",
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false, false,
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false, false,
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- hsotg->hw_params.arch !=
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- GHWCFG2_SLAVE_ONLY_ARCH);
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+ dma_capable);
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/*
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/*
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* The values for g_rx_fifo_size (2048) and
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* The values for g_rx_fifo_size (2048) and
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