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@@ -418,6 +418,10 @@ static i40e_status i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer,
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bool last_command)
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{
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i40e_status ret_code = I40E_ERR_NVM;
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+ struct i40e_asq_cmd_details cmd_details;
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+
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+ memset(&cmd_details, 0, sizeof(cmd_details));
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+ cmd_details.wb_desc = &hw->nvm_wb_desc;
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/* Here we are checking the SR limit only for the flat memory model.
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* We cannot do it for the module-based model, as we did not acquire
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@@ -443,7 +447,7 @@ static i40e_status i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer,
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ret_code = i40e_aq_update_nvm(hw, module_pointer,
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2 * offset, /*bytes*/
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2 * words, /*bytes*/
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- data, last_command, NULL);
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+ data, last_command, &cmd_details);
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return ret_code;
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}
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@@ -1041,6 +1045,7 @@ static i40e_status i40e_nvmupd_nvm_read(struct i40e_hw *hw,
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struct i40e_nvm_access *cmd,
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u8 *bytes, int *perrno)
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{
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+ struct i40e_asq_cmd_details cmd_details;
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i40e_status status;
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u8 module, transaction;
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bool last;
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@@ -1049,8 +1054,11 @@ static i40e_status i40e_nvmupd_nvm_read(struct i40e_hw *hw,
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module = i40e_nvmupd_get_module(cmd->config);
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last = (transaction == I40E_NVM_LCB) || (transaction == I40E_NVM_SA);
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+ memset(&cmd_details, 0, sizeof(cmd_details));
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+ cmd_details.wb_desc = &hw->nvm_wb_desc;
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+
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status = i40e_aq_read_nvm(hw, module, cmd->offset, (u16)cmd->data_size,
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- bytes, last, NULL);
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+ bytes, last, &cmd_details);
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if (status) {
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i40e_debug(hw, I40E_DEBUG_NVM,
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"i40e_nvmupd_nvm_read mod 0x%x off 0x%x len 0x%x\n",
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@@ -1077,14 +1085,19 @@ static i40e_status i40e_nvmupd_nvm_erase(struct i40e_hw *hw,
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int *perrno)
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{
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i40e_status status = 0;
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+ struct i40e_asq_cmd_details cmd_details;
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u8 module, transaction;
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bool last;
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transaction = i40e_nvmupd_get_transaction(cmd->config);
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module = i40e_nvmupd_get_module(cmd->config);
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last = (transaction & I40E_NVM_LCB);
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+
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+ memset(&cmd_details, 0, sizeof(cmd_details));
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+ cmd_details.wb_desc = &hw->nvm_wb_desc;
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+
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status = i40e_aq_erase_nvm(hw, module, cmd->offset, (u16)cmd->data_size,
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- last, NULL);
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+ last, &cmd_details);
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if (status) {
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i40e_debug(hw, I40E_DEBUG_NVM,
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"i40e_nvmupd_nvm_erase mod 0x%x off 0x%x len 0x%x\n",
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@@ -1112,6 +1125,7 @@ static i40e_status i40e_nvmupd_nvm_write(struct i40e_hw *hw,
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u8 *bytes, int *perrno)
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{
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i40e_status status = 0;
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+ struct i40e_asq_cmd_details cmd_details;
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u8 module, transaction;
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bool last;
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@@ -1119,8 +1133,12 @@ static i40e_status i40e_nvmupd_nvm_write(struct i40e_hw *hw,
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module = i40e_nvmupd_get_module(cmd->config);
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last = (transaction & I40E_NVM_LCB);
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+ memset(&cmd_details, 0, sizeof(cmd_details));
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+ cmd_details.wb_desc = &hw->nvm_wb_desc;
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+
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status = i40e_aq_update_nvm(hw, module, cmd->offset,
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- (u16)cmd->data_size, bytes, last, NULL);
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+ (u16)cmd->data_size, bytes, last,
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+ &cmd_details);
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if (status) {
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i40e_debug(hw, I40E_DEBUG_NVM,
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"i40e_nvmupd_nvm_write mod 0x%x off 0x%x len 0x%x\n",
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