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@@ -542,7 +542,7 @@ intel_dp_aux_native_write(struct intel_dp *intel_dp,
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return -E2BIG;
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intel_dp_check_edp(intel_dp);
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- msg[0] = AUX_NATIVE_WRITE << 4;
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+ msg[0] = DP_AUX_NATIVE_WRITE << 4;
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msg[1] = address >> 8;
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msg[2] = address & 0xff;
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msg[3] = send_bytes - 1;
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@@ -552,9 +552,10 @@ intel_dp_aux_native_write(struct intel_dp *intel_dp,
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ret = intel_dp_aux_ch(intel_dp, msg, msg_bytes, &ack, 1);
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if (ret < 0)
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return ret;
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- if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK)
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+ ack >>= 4;
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+ if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK)
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break;
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- else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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+ else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(100);
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else
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return -EIO;
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@@ -586,7 +587,7 @@ intel_dp_aux_native_read(struct intel_dp *intel_dp,
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return -E2BIG;
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intel_dp_check_edp(intel_dp);
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- msg[0] = AUX_NATIVE_READ << 4;
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+ msg[0] = DP_AUX_NATIVE_READ << 4;
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msg[1] = address >> 8;
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msg[2] = address & 0xff;
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msg[3] = recv_bytes - 1;
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@@ -601,12 +602,12 @@ intel_dp_aux_native_read(struct intel_dp *intel_dp,
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return -EPROTO;
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if (ret < 0)
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return ret;
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- ack = reply[0];
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- if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) {
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+ ack = reply[0] >> 4;
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+ if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_ACK) {
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memcpy(recv, reply + 1, ret - 1);
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return ret - 1;
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}
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- else if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_DEFER)
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+ else if ((ack & DP_AUX_NATIVE_REPLY_MASK) == DP_AUX_NATIVE_REPLY_DEFER)
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udelay(100);
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else
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return -EIO;
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@@ -633,12 +634,12 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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intel_dp_check_edp(intel_dp);
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/* Set up the command byte */
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if (mode & MODE_I2C_READ)
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- msg[0] = AUX_I2C_READ << 4;
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+ msg[0] = DP_AUX_I2C_READ << 4;
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else
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- msg[0] = AUX_I2C_WRITE << 4;
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+ msg[0] = DP_AUX_I2C_WRITE << 4;
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if (!(mode & MODE_I2C_STOP))
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- msg[0] |= AUX_I2C_MOT << 4;
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+ msg[0] |= DP_AUX_I2C_MOT << 4;
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msg[1] = address >> 8;
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msg[2] = address;
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@@ -675,17 +676,17 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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goto out;
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}
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- switch (reply[0] & AUX_NATIVE_REPLY_MASK) {
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- case AUX_NATIVE_REPLY_ACK:
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+ switch ((reply[0] >> 4) & DP_AUX_NATIVE_REPLY_MASK) {
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+ case DP_AUX_NATIVE_REPLY_ACK:
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/* I2C-over-AUX Reply field is only valid
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* when paired with AUX ACK.
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*/
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break;
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- case AUX_NATIVE_REPLY_NACK:
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+ case DP_AUX_NATIVE_REPLY_NACK:
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DRM_DEBUG_KMS("aux_ch native nack\n");
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ret = -EREMOTEIO;
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goto out;
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- case AUX_NATIVE_REPLY_DEFER:
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+ case DP_AUX_NATIVE_REPLY_DEFER:
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/*
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* For now, just give more slack to branch devices. We
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* could check the DPCD for I2C bit rate capabilities,
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@@ -706,18 +707,18 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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goto out;
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}
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- switch (reply[0] & AUX_I2C_REPLY_MASK) {
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- case AUX_I2C_REPLY_ACK:
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+ switch ((reply[0] >> 4) & DP_AUX_I2C_REPLY_MASK) {
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+ case DP_AUX_I2C_REPLY_ACK:
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if (mode == MODE_I2C_READ) {
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*read_byte = reply[1];
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}
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ret = reply_bytes - 1;
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goto out;
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- case AUX_I2C_REPLY_NACK:
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+ case DP_AUX_I2C_REPLY_NACK:
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DRM_DEBUG_KMS("aux_i2c nack\n");
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ret = -EREMOTEIO;
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goto out;
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- case AUX_I2C_REPLY_DEFER:
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+ case DP_AUX_I2C_REPLY_DEFER:
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DRM_DEBUG_KMS("aux_i2c defer\n");
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udelay(100);
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break;
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