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@@ -815,7 +815,7 @@ static const struct mips_perf_event mipsxxcore_event_map
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};
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};
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/* 74K core has different branch event code. */
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/* 74K core has different branch event code. */
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-static const struct mips_perf_event mipsxx74Kcore_event_map
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+static const struct mips_perf_event mipsxxcore_event_map2
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[PERF_COUNT_HW_MAX] = {
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[PERF_COUNT_HW_MAX] = {
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[PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
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[PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
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[PERF_COUNT_HW_INSTRUCTIONS] = { 0x01, CNTR_EVEN | CNTR_ODD, T },
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[PERF_COUNT_HW_INSTRUCTIONS] = { 0x01, CNTR_EVEN | CNTR_ODD, T },
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@@ -931,7 +931,7 @@ static const struct mips_perf_event mipsxxcore_cache_map
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};
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};
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/* 74K core has completely different cache event map. */
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/* 74K core has completely different cache event map. */
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-static const struct mips_perf_event mipsxx74Kcore_cache_map
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+static const struct mips_perf_event mipsxxcore_cache_map2
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_OP_MAX]
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[PERF_COUNT_HW_CACHE_RESULT_MAX] = {
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[PERF_COUNT_HW_CACHE_RESULT_MAX] = {
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@@ -1577,8 +1577,8 @@ init_hw_perf_events(void)
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break;
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break;
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case CPU_74K:
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case CPU_74K:
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mipspmu.name = "mips/74K";
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mipspmu.name = "mips/74K";
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- mipspmu.general_event_map = &mipsxx74Kcore_event_map;
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- mipspmu.cache_event_map = &mipsxx74Kcore_cache_map;
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+ mipspmu.general_event_map = &mipsxxcore_event_map2;
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+ mipspmu.cache_event_map = &mipsxxcore_cache_map2;
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break;
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break;
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case CPU_1004K:
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case CPU_1004K:
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mipspmu.name = "mips/1004K";
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mipspmu.name = "mips/1004K";
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