This enables the L2 cache controller available in Amlogic SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Carlo Caione <carlo@caione.org>
@@ -2,6 +2,7 @@ menuconfig ARCH_MESON
bool "Amlogic Meson SoCs" if ARCH_MULTI_V7
select GENERIC_IRQ_CHIP
select ARM_GIC
+ select CACHE_L2X0
if ARCH_MESON
@@ -24,4 +24,6 @@ static const char * const meson_common_board_compat[] = {
DT_MACHINE_START(MESON, "Amlogic Meson platform")
.dt_compat = meson_common_board_compat,
+ .l2c_aux_val = 0,
+ .l2c_aux_mask = ~0,
MACHINE_END