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@@ -34,14 +34,14 @@
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#include "coherency.h"
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#include "mvebu-soc-id.h"
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+static void __iomem *scu_base;
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+
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/*
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* Enables the SCU when available. Obviously, this is only useful on
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* Cortex-A based SOCs, not on PJ4B based ones.
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*/
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static void __init mvebu_scu_enable(void)
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{
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- void __iomem *scu_base;
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-
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struct device_node *np =
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of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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if (np) {
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@@ -51,6 +51,11 @@ static void __init mvebu_scu_enable(void)
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}
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}
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+void __iomem *mvebu_get_scu_base(void)
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+{
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+ return scu_base;
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+}
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+
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/*
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* Early versions of Armada 375 SoC have a bug where the BootROM
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* leaves an external data abort pending. The kernel is hit by this
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