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@@ -204,6 +204,13 @@ static int atmel_ssc_startup(struct snd_pcm_substream *substream,
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pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
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ssc_readl(ssc_p->ssc->regs, SR));
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+ /* Enable PMC peripheral clock for this SSC */
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+ pr_debug("atmel_ssc_dai: Starting clock\n");
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+ clk_enable(ssc_p->ssc->clk);
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+
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+ /* Reset the SSC to keep it at a clean status */
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+ ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
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+
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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dir = 0;
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dir_mask = SSC_DIR_MASK_PLAYBACK;
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@@ -250,11 +257,6 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream *substream,
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dma_params = ssc_p->dma_params[dir];
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if (dma_params != NULL) {
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- ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
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- pr_debug("atmel_ssc_shutdown: %s disabled SSC_SR=0x%08x\n",
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- (dir ? "receive" : "transmit"),
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- ssc_readl(ssc_p->ssc->regs, SR));
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-
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dma_params->ssc = NULL;
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dma_params->substream = NULL;
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ssc_p->dma_params[dir] = NULL;
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@@ -266,10 +268,6 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream *substream,
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ssc_p->dir_mask &= ~dir_mask;
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if (!ssc_p->dir_mask) {
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if (ssc_p->initialized) {
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- /* Shutdown the SSC clock. */
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- pr_debug("atmel_ssc_dai: Stopping clock\n");
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- clk_disable(ssc_p->ssc->clk);
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-
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free_irq(ssc_p->ssc->irq, ssc_p);
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ssc_p->initialized = 0;
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}
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@@ -280,6 +278,10 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream *substream,
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ssc_p->cmr_div = ssc_p->tcmr_period = ssc_p->rcmr_period = 0;
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}
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spin_unlock_irq(&ssc_p->lock);
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+
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+ /* Shutdown the SSC clock. */
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+ pr_debug("atmel_ssc_dai: Stopping clock\n");
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+ clk_disable(ssc_p->ssc->clk);
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}
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@@ -450,13 +452,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
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break;
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case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
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- /*
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- * I2S format, CODEC supplies BCLK and LRC clocks.
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- *
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- * The SSC transmit clock is obtained from the BCLK signal on
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- * on the TK line, and the SSC receive clock is
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- * generated from the transmit clock.
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- */
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+ /* I2S format, CODEC supplies BCLK and LRC clocks. */
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rcmr = SSC_BF(RCMR_PERIOD, 0)
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| SSC_BF(RCMR_STTDLY, START_DELAY)
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| SSC_BF(RCMR_START, SSC_START_FALLING_RF)
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@@ -491,6 +487,54 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
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| SSC_BF(TFMR_DATLEN, (bits - 1));
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break;
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+ case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFS:
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+ /* I2S format, CODEC supplies BCLK, SSC supplies LRCLK. */
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+ if (bits > 16 && !ssc->pdata->has_fslen_ext) {
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+ dev_err(dai->dev,
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+ "sample size %d is too large for SSC device\n",
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+ bits);
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+ return -EINVAL;
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+ }
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+
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+ fslen_ext = (bits - 1) / 16;
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+ fslen = (bits - 1) % 16;
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+
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+ rcmr = SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
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+ | SSC_BF(RCMR_STTDLY, START_DELAY)
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+ | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
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+ | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
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+ | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
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+ | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
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+ SSC_CKS_PIN : SSC_CKS_CLOCK);
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+
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+ rfmr = SSC_BF(RFMR_FSLEN_EXT, fslen_ext)
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+ | SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
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+ | SSC_BF(RFMR_FSOS, SSC_FSOS_NEGATIVE)
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+ | SSC_BF(RFMR_FSLEN, fslen)
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+ | SSC_BF(RFMR_DATNB, (channels - 1))
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+ | SSC_BIT(RFMR_MSBF)
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+ | SSC_BF(RFMR_LOOP, 0)
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+ | SSC_BF(RFMR_DATLEN, (bits - 1));
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+
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+ tcmr = SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
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+ | SSC_BF(TCMR_STTDLY, START_DELAY)
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+ | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
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+ | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
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+ | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
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+ | SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
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+ SSC_CKS_CLOCK : SSC_CKS_PIN);
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+
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+ tfmr = SSC_BF(TFMR_FSLEN_EXT, fslen_ext)
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+ | SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_NEGATIVE)
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+ | SSC_BF(TFMR_FSDEN, 0)
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+ | SSC_BF(TFMR_FSOS, SSC_FSOS_NEGATIVE)
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+ | SSC_BF(TFMR_FSLEN, fslen)
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+ | SSC_BF(TFMR_DATNB, (channels - 1))
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+ | SSC_BIT(TFMR_MSBF)
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+ | SSC_BF(TFMR_DATDEF, 0)
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+ | SSC_BF(TFMR_DATLEN, (bits - 1));
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+ break;
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+
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case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
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/*
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* DSP/PCM Mode A format, SSC provides BCLK and LRC clocks.
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@@ -535,10 +579,6 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
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/*
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* DSP/PCM Mode A format, CODEC supplies BCLK and LRC clocks.
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*
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- * The SSC transmit clock is obtained from the BCLK signal on
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- * on the TK line, and the SSC receive clock is
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- * generated from the transmit clock.
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- *
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* Data is transferred on first BCLK after LRC pulse rising
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* edge.If stereo, the right channel data is contiguous with
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* the left channel data.
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@@ -587,23 +627,17 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
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rcmr, rfmr, tcmr, tfmr);
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if (!ssc_p->initialized) {
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-
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- /* Enable PMC peripheral clock for this SSC */
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- pr_debug("atmel_ssc_dai: Starting clock\n");
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- clk_enable(ssc_p->ssc->clk);
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-
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- /* Reset the SSC and its PDC registers */
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- ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
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-
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- ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);
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- ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);
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- ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);
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- ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0);
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-
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- ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0);
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- ssc_writel(ssc_p->ssc->regs, PDC_TCR, 0);
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- ssc_writel(ssc_p->ssc->regs, PDC_TNPR, 0);
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- ssc_writel(ssc_p->ssc->regs, PDC_TNCR, 0);
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+ if (!ssc_p->ssc->pdata->use_dma) {
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+ ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);
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+ ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);
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+ ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);
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+ ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0);
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+
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+ ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0);
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+ ssc_writel(ssc_p->ssc->regs, PDC_TCR, 0);
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+ ssc_writel(ssc_p->ssc->regs, PDC_TNPR, 0);
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+ ssc_writel(ssc_p->ssc->regs, PDC_TNCR, 0);
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+ }
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ret = request_irq(ssc_p->ssc->irq, atmel_ssc_interrupt, 0,
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ssc_p->name, ssc_p);
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