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@@ -16,12 +16,21 @@ enum {
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NVM_IOTYPE_GC = 1,
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};
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-#define NVM_BLK_BITS (16)
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-#define NVM_PG_BITS (16)
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-#define NVM_SEC_BITS (8)
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-#define NVM_PL_BITS (8)
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-#define NVM_LUN_BITS (8)
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-#define NVM_CH_BITS (7)
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+/* common format */
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+#define NVM_GEN_CH_BITS (8)
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+#define NVM_GEN_LUN_BITS (8)
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+#define NVM_GEN_BLK_BITS (16)
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+#define NVM_GEN_RESERVED (32)
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+
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+/* 1.2 format */
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+#define NVM_12_PG_BITS (16)
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+#define NVM_12_PL_BITS (4)
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+#define NVM_12_SEC_BITS (4)
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+#define NVM_12_RESERVED (8)
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+
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+/* 2.0 format */
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+#define NVM_20_SEC_BITS (24)
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+#define NVM_20_RESERVED (8)
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enum {
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NVM_OCSSD_SPEC_12 = 12,
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@@ -31,16 +40,34 @@ enum {
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struct ppa_addr {
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/* Generic structure for all addresses */
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union {
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+ /* generic device format */
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struct {
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- u64 blk : NVM_BLK_BITS;
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- u64 pg : NVM_PG_BITS;
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- u64 sec : NVM_SEC_BITS;
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- u64 pl : NVM_PL_BITS;
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- u64 lun : NVM_LUN_BITS;
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- u64 ch : NVM_CH_BITS;
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- u64 reserved : 1;
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+ u64 ch : NVM_GEN_CH_BITS;
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+ u64 lun : NVM_GEN_LUN_BITS;
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+ u64 blk : NVM_GEN_BLK_BITS;
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+ u64 reserved : NVM_GEN_RESERVED;
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+ } a;
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+
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+ /* 1.2 device format */
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+ struct {
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+ u64 ch : NVM_GEN_CH_BITS;
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+ u64 lun : NVM_GEN_LUN_BITS;
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+ u64 blk : NVM_GEN_BLK_BITS;
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+ u64 pg : NVM_12_PG_BITS;
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+ u64 pl : NVM_12_PL_BITS;
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+ u64 sec : NVM_12_SEC_BITS;
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+ u64 reserved : NVM_12_RESERVED;
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} g;
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+ /* 2.0 device format */
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+ struct {
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+ u64 grp : NVM_GEN_CH_BITS;
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+ u64 pu : NVM_GEN_LUN_BITS;
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+ u64 chk : NVM_GEN_BLK_BITS;
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+ u64 sec : NVM_20_SEC_BITS;
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+ u64 reserved : NVM_20_RESERVED;
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+ } m;
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+
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struct {
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u64 line : 63;
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u64 is_cached : 1;
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@@ -374,15 +401,25 @@ static inline struct ppa_addr generic_to_dev_addr(struct nvm_tgt_dev *tgt_dev,
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struct ppa_addr r)
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{
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struct nvm_geo *geo = &tgt_dev->geo;
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- struct nvm_addrf_12 *ppaf = (struct nvm_addrf_12 *)&geo->addrf;
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struct ppa_addr l;
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- l.ppa = ((u64)r.g.ch) << ppaf->ch_offset;
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- l.ppa |= ((u64)r.g.lun) << ppaf->lun_offset;
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- l.ppa |= ((u64)r.g.blk) << ppaf->blk_offset;
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- l.ppa |= ((u64)r.g.pg) << ppaf->pg_offset;
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- l.ppa |= ((u64)r.g.pl) << ppaf->pln_offset;
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- l.ppa |= ((u64)r.g.sec) << ppaf->sec_offset;
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+ if (geo->version == NVM_OCSSD_SPEC_12) {
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+ struct nvm_addrf_12 *ppaf = (struct nvm_addrf_12 *)&geo->addrf;
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+
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+ l.ppa = ((u64)r.g.ch) << ppaf->ch_offset;
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+ l.ppa |= ((u64)r.g.lun) << ppaf->lun_offset;
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+ l.ppa |= ((u64)r.g.blk) << ppaf->blk_offset;
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+ l.ppa |= ((u64)r.g.pg) << ppaf->pg_offset;
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+ l.ppa |= ((u64)r.g.pl) << ppaf->pln_offset;
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+ l.ppa |= ((u64)r.g.sec) << ppaf->sec_offset;
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+ } else {
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+ struct nvm_addrf *lbaf = &geo->addrf;
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+
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+ l.ppa = ((u64)r.m.grp) << lbaf->ch_offset;
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+ l.ppa |= ((u64)r.m.pu) << lbaf->lun_offset;
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+ l.ppa |= ((u64)r.m.chk) << lbaf->chk_offset;
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+ l.ppa |= ((u64)r.m.sec) << lbaf->sec_offset;
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+ }
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return l;
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}
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@@ -391,17 +428,27 @@ static inline struct ppa_addr dev_to_generic_addr(struct nvm_tgt_dev *tgt_dev,
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struct ppa_addr r)
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{
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struct nvm_geo *geo = &tgt_dev->geo;
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- struct nvm_addrf_12 *ppaf = (struct nvm_addrf_12 *)&geo->addrf;
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struct ppa_addr l;
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l.ppa = 0;
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- l.g.ch = (r.ppa & ppaf->ch_mask) >> ppaf->ch_offset;
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- l.g.lun = (r.ppa & ppaf->lun_mask) >> ppaf->lun_offset;
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- l.g.blk = (r.ppa & ppaf->blk_mask) >> ppaf->blk_offset;
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- l.g.pg = (r.ppa & ppaf->pg_mask) >> ppaf->pg_offset;
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- l.g.pl = (r.ppa & ppaf->pln_mask) >> ppaf->pln_offset;
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- l.g.sec = (r.ppa & ppaf->sec_mask) >> ppaf->sec_offset;
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+ if (geo->version == NVM_OCSSD_SPEC_12) {
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+ struct nvm_addrf_12 *ppaf = (struct nvm_addrf_12 *)&geo->addrf;
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+
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+ l.g.ch = (r.ppa & ppaf->ch_mask) >> ppaf->ch_offset;
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+ l.g.lun = (r.ppa & ppaf->lun_mask) >> ppaf->lun_offset;
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+ l.g.blk = (r.ppa & ppaf->blk_mask) >> ppaf->blk_offset;
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+ l.g.pg = (r.ppa & ppaf->pg_mask) >> ppaf->pg_offset;
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+ l.g.pl = (r.ppa & ppaf->pln_mask) >> ppaf->pln_offset;
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+ l.g.sec = (r.ppa & ppaf->sec_mask) >> ppaf->sec_offset;
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+ } else {
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+ struct nvm_addrf *lbaf = &geo->addrf;
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+
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+ l.m.grp = (r.ppa & lbaf->ch_mask) >> lbaf->ch_offset;
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+ l.m.pu = (r.ppa & lbaf->lun_mask) >> lbaf->lun_offset;
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+ l.m.chk = (r.ppa & lbaf->chk_mask) >> lbaf->chk_offset;
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+ l.m.sec = (r.ppa & lbaf->sec_mask) >> lbaf->sec_offset;
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+ }
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return l;
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}
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