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@@ -41,14 +41,17 @@ CEC. It is one end of the pipeline.
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Required properties:
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- compatible: value must be one of:
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* allwinner,sun5i-a10s-hdmi
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+ * allwinner,sun6i-a31-hdmi
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- reg: base address and size of memory-mapped region
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- interrupts: interrupt associated to this IP
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- clocks: phandles to the clocks feeding the HDMI encoder
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* ahb: the HDMI interface clock
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* mod: the HDMI module clock
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+ * ddc: the HDMI ddc clock (A31 only)
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* pll-0: the first video PLL
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* pll-1: the second video PLL
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- clock-names: the clock names mentioned above
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+ - resets: phandle to the reset control for the HDMI encoder (A31 only)
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- dmas: phandles to the DMA channels used by the HDMI encoder
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* ddc-tx: The channel for DDC transmission
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* ddc-rx: The channel for DDC reception
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