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@@ -30,6 +30,7 @@
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#include <linux/reset.h>
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#include <linux/reset.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_runtime.h>
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+#include <linux/iopoll.h>
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#include <asm/unaligned.h>
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#include <asm/unaligned.h>
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@@ -112,6 +113,8 @@
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#define I2C_CLKEN_OVERRIDE 0x090
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#define I2C_CLKEN_OVERRIDE 0x090
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#define I2C_MST_CORE_CLKEN_OVR BIT(0)
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#define I2C_MST_CORE_CLKEN_OVR BIT(0)
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+#define I2C_CONFIG_LOAD_TIMEOUT 1000000
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+
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/*
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/*
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* msg_end_type: The bus control which need to be send at end of transfer.
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* msg_end_type: The bus control which need to be send at end of transfer.
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* @MSG_END_STOP: Send stop pulse at end of transfer.
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* @MSG_END_STOP: Send stop pulse at end of transfer.
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@@ -448,7 +451,6 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
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u32 val;
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u32 val;
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int err;
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int err;
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u32 clk_divisor;
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u32 clk_divisor;
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- unsigned long timeout = jiffies + HZ;
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err = pm_runtime_get_sync(i2c_dev->dev);
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err = pm_runtime_get_sync(i2c_dev->dev);
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if (err < 0) {
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if (err < 0) {
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@@ -497,15 +499,18 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
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i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE);
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i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE);
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if (i2c_dev->hw->has_config_load_reg) {
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if (i2c_dev->hw->has_config_load_reg) {
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+ unsigned long reg_offset;
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+ void __iomem *addr;
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+
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+ reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_CONFIG_LOAD);
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+ addr = i2c_dev->base + reg_offset;
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i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD);
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i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD);
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- while (i2c_readl(i2c_dev, I2C_CONFIG_LOAD) != 0) {
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- if (time_after(jiffies, timeout)) {
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- dev_warn(i2c_dev->dev,
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- "timeout waiting for config load\n");
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- err = -ETIMEDOUT;
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- goto err;
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- }
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- msleep(1);
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+ err = readl_poll_timeout(addr, val, val == 0, 1000,
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+ I2C_CONFIG_LOAD_TIMEOUT);
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+ if (err) {
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+ dev_warn(i2c_dev->dev,
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+ "timeout waiting for config load\n");
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+ goto err;
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}
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}
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}
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}
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